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Al/SiO2/pp+-Si metal-insulator-semiconductor (MIS) solar cell device was simulated using a comprehensive numerical model. The semiconductor layer consists of p-type Si epitaxial layer (base) which is deposited on p+-Si(001) substrate. The doping profile in the base layer was chosen to be arbitrary with different doping gradients. The effect of doping profile in the base layer and substrate was studied...
We present the reliabilities in compressively strained SiGe channel pMOSFETs. A Si capping layer in SiGe channel pMOSFETs improved the negative bias temperature instability (NBTI) without device performance degradation. Also, the Si capped device exhibits the better NBTI reliability than the Si channel device. Because a Si capped structure forms the double barrier layer in the interface, it is the...
We report a novel device which exploits the internally combined quantum mechanical Band-To-Band and Barrier Tunneling mechanisms to achieve improved performances and overcome the intrinsic low current drive limitations of conventional Tunnel FETs and the 60 mV/decade limitation of MOSFETs at room temperature. The new structure, including an ultra-thin dielectric between metal source and silicon channel,...
The continuous and systematic increase in transistor density and performance, as described in ldquoMoore's Lawrdquo and guided by CMOS scaling theory, has been remarkably successful for the development of silicon technology for the past 40 years. As the silicon industry moves into sub-ten nanometer dimensions, significant technology challenges in device performance, power dissipation, and variability...
The continuous and systematic increase in transistor density and performance, as described in ldquoMoore's Lawrdquo and guided by CMOS scaling theory, has been remarkably successful for the development of silicon technology for the past 40 years. As the silicon industry moves into sub-ten nanometer dimensions, significant technology challenges in device performance, power dissipation, and variability...
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