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A majority-dynamic method of reconfiguring the on-board computer system in the time slot required for the control and diagnostics system performance is described. The described method provides fault tolerance of multiprocessor supercomputer rack in accordance with the concept of the integration of on-board equipment IMA. Using the control automat with implemented algorithm of self-diagnostic makes...
Organizations need process data in real time. Cloud Computing is a common choice but it presents high latency on data transfer. As an alternative to reduces the latency, Edge computing based on System-on-a-Chip systems (SoC-based systems) can retain part of the data processing, allowing resource sharing among multiple requests through the use of OS-level virtualization. In this work, we analyze the...
We give efficient algorithms to solve fundamental data movement problems on mesh-connected computers augmented with limited global bandwidth. Adding a small amount of global bandwidth makes a practical design that combines aspects of mesh and fully connected models to achieve the benefits of each. We give algorithms for sorting, finding the median, finding a spanning tree, and determining various...
This paper presents our practice of teaching the contemporary ARMv7M architecture and ARM assembly programming, and our experience of using μVision, a professional embedded software development environment, for assembly programming assignments on ARM Cortex-M processor-based systems. ARM architectures are dominantly used in mobile devices and embedded systems [4]. The survey data on the use of μVision...
Hardware Intelligence is an attractive concept that has the potential to make electronic, industrial and reliability-oriented applications efficiently optimized. This work investigates different frameworks and analyzes their challenges. Hardware automation faces different challenges like scalability, overhead, testability as well as goal definition. For better classification, hardware systems are...
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Previous available benchmarks for multiprocessors have focused on high-performance computing applications and used a limited number of synchronization methods. PARSEC includes emerging applications in recognition, mining and...
This research shows the results of the modification of the Thai word prediction from NECTEC to support the effectiveness of word processing tools in improving the literacy skills and usability of the original Thai word prediction program for students with learning disabilities in grades 4–12. The entry strategies of 2 groups of 40 students with learning disabilities were compared. The original group...
In this review paper, we present reasons the current best cryptographic algorithms will fail classical computer security in post-quantum era. The presented security gaps outline the need to develop quantum-resistant cryptographic functions and algorithm for classical computers, with a few novel recommendations to the effect. Therefore, we believe this paper will enlighten and generate interest in...
Technology needs to be eco-friendly most importantly microchips need to be redesigned and manufactured in an eco-friendly manner since they are the heart of all technology. With a look to the future its not hard for one to conclude that silicon will meet its fate. Wise men said the best time to plant a tree was 20 years ago and the second best time is now. Silicon microchips have been the primary...
Many recently proposed graph-processing frameworks utilize powerful computer clusters with dozens of cores to process massive graphs. Their usability and flexibility often come at a cost. We demonstrate that custom software written for “nanocomputers,” including a credit-card-sized Raspberry Pi, a low-cost ARM server, and an Intel Atom computer, can process the same graphs. Our implementations of...
One of the most important machine learning techniques include clustering of data into different clusters or categories. There are several decent algorithms and techniques that exist to perform clustering on small to medium scale data. In the era of Big Data and with applications being large-scale and data-intensive in nature, there is a significant increment in volume, variety and velocity of data...
The left-preconditioned communication avoiding conjugate gradient (LP-CA-CG) method is applied to the pressure Poisson equation in the multiphase CFD code JUPITER. The arithmetic intensity of the LP-CA-CG method is analyzed, and is dramatically improved by loop splitting for inner product operations and for three term recurrence operations. Two LPCA-CG solvers with block Jacobi preconditioning and...
The main contribution of this paper is to show an implementation of the parallel convex hull algorithm on the Parallella architecture. Parallella is a single-board computer with 16 mesh-connected cores. We have considered the memory architecture and mesh-connected network of the Parallella architecture. We evaluated the computing time and the energy-efficiency by comparing with various computing platforms...
Bi Swapped Networks (BSN) is a symmetrical hybrid Opto-electronic network architecture related to the family of Swapped/OTIS interconnection networks. In fact, the symmetrical nature the network supports ease of design and implementation of parallel algorithms in comparison to its well known counterpart asymmetrical Opto-electronic network named OTIS networks. BSN mesh contains 2n4 copies (n represents...
PWCS (Probabilistic Write / Copy-Select) is a new kind of lock-free synchronization mechanism with wait-free characteristics proposed by Nicholas Mc Guire at the 13th real-time Linux workshop, which utilizes the inherent randomness of the modern computer systems. It aims at addressing the multi-reader - single-writer problem in Linux. Based on the original label-based PWCS, we propose a hash-based...
This paper overviews a technique for verifying cache coherence protocols described in the Promela language. The approach is comprised of the following steps. First, a model written for a certain configuration of the memory system is generalized to the model being parameterized with the number of processors. Second, the parameterized model is abstracted from the exact number of processors. Finally,...
Sparse Matrix-Vector multiplication (SpMV) is a computational kernel widely used in many applications. There are many different implementations using different processors and algorithms for SpMV. The performances of different SpMV implementations are quite different, and it is basically difficult to choose the implementation that has the best performance for a given sparse matrix and a given platform...
This paper analyzes the parallelization efficiency of Menge [1], an open source virtual crowd simulation system widely used for algorithm benchmarking, with focuses on three aspects: performance of the existing parallel processing scheme, bottleneck of parallel processing, and improvement opportunities for parallel efficiency of the system. First, we calculate the speedup ratio of each Menge module...
We consider a practical makespan minimization problem that arises in a multiprocessor computer system where some processors may be shut down during computation to save an amount of shared power. The system consists of m processors driven by a common power source. The processors are modeled as a set of identical parallel machines. Moreover, we consider a set of n independent, nonpreemptive jobs which...
In order to run Computational Fluid Dynamics (CFD) codes on large scale infrastructures, parallel computing has to be used because of the computational intensive nature of the problems. In this paper we investigate the 3D version of the ADAPT platform where we do a coupling between flow partial differential equations and a Poisson equation. This coupling leads to a linear system that we solve using...
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