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A 24 GHz low-noise amplifier (LNA) with trimming capability is presented. It is demonstrated, that with the proposed trimming concept, frequency shifts due to model uncertainties, process variations, and underestimated parasitic capacitances can be compensated. The realized LNA showed a shift in peak gain of 2.5 GHz towards lower frequencies in the non-trimmed state. After trimming to the specified...
Analog to Digital Converter(ADC) helps us to connect between analog to digital world. ADCs have function from a tiny electronic device to medical imaging and satellites. Resolution, sampling rate, effective number of bits, power dissipation are some of the commonly accepted parameters to evaluate key performance characteristics of ADCs. This paper presents a detailed performance evaluation survey...
This work demonstrates a fully integrated 24 GHz CMOS receiver for high gain and wireless sensor network. The receiver incorporates a low noise amplifier, double-balanced mixer and an active balun for single to differential. This mixer designs with active load to decrease power dissipation. To increase mixer gain, an inductor is added to eliminate parasitic capacitances at the load of input transistor...
A low-power low-noise chopper operational amplifier for biosensor applications is proposed. It employs a simple ripple suppression method using a band-pass amplifier. The input referred noise is only 43nV/rtHz. Fabricated in a 130nm standard CMOS process, it occupies a chip area of 0.28mm2 and consumes 33ßA from a 1.2V supply.
Using terahertz waves for imaging is gaining increased interest. A CMOS cascode amplifier biased near the threshold voltage of a MOSFET for terahertz direct detection is proposed. A test chip composed of 4×4 pixel CMOS terahertz imaging array is designed and fabricated on the basis of a low-cost 180-nm CMOS process technology. Each pixel consists of a microstrip patch antenna, an impedance-matching...
An improved architecture of an active quasi-circulator (QC) is proposed for monostatic FMCW automotive radars. Special attention is paid on the receiver noise figure (NF) performance as well as high transmit (TX) to receive (RX) signal isolation. The high TX/RX isolation is achieved by using a W-band CMOS based impedance tuner acting as a leakage canceler. Also process variation as well as antenna...
In this paper the design and measurement of a four stage broadband differential power amplifier intended for W-band using 40 nm bulk CMOS is presented. In order to achieve broadband performance a complex output matching network consisting of transmission line elements and transformers is employed. Furthermore capacitive cross-coupling neutralization is introduced to enhance the stability and the small-signal...
Phased-array feeds are being developed for expantion of the field-of-view of parabolic reflector antennas. The University of Calgary (UCalgary) and the National Research Council (NRC) of Canada have recently demonstrated a low-noise phased-array feed for possible use in the Square Kilometre Array radio telescope. NRC has made noise measurements of such an array equipped with CMOS low-noise amplifiers...
This paper presents the design of a fully integrated CMOS 4-channel phased-array receiver for 10.5–14.5 GHz telecom infrastructure, microwave link and radar applications. The phased-array is built using 0.13μm CMOS, and has a gain of 24.5 dB at 12.5 GHz, an input IIP3 of −7.3 dBm, a NF of 4.8 dB and the RMS phase error is 3o. The chip occupies an area of 2.9×3.2mm with a total power consumption of...
Increasing mobile data demands are pushing cellular network capacity. Massive MIMO base stations with large antenna arrays and smaller cell sizes demand higher integration in radio transceivers than what is available [1].
This paper presents a W-band low power, wideband low noise amplifier design in 65nm CMOS. Low noise amplifier consists of six-stage to obtain high gain. For a high-data rate communication system, the wideband characteristic is very important. In order to enhance the 3 dB bandwidth, a two-center frequency technique is used. In addition, the amplifier was realized by a conjugate matching technique to...
This paper overviews the implementation of CMOS radio-frequency (RF) building blocks intended for low power applications in the 2.4 GHz industrial, scientific, and medical (ISM) band. The design approach exploits the biasing of MOS devices in their moderate inversion region to optimize the trade-off between the performance and the power consumption. Two circuit structures are discussed. First, the...
This work presents a disposable ‘electronic microplate’ (e-microplate) platform that enables the reusability of the corresponding CMOS biosensor thereby reducing cost and increasing throughput relative to non-disposable systems. The e-microplate utilizes mechanically-flexible interconnects (MFIs) and through-silicon-vias (TSVs) to electrically interconnect the electrodes on the CMOS biosensor to the...
This work proposes a wideband transconductance enhancement CMOS LNA with multiple feedback technique. Two positive-feedback loops are used to alleviate the restricted gm value for input matching of the CG LNA. By using a triple-well process, the bulk cross-coupling connection between the common-gate amplifiers enhances the transconductance (gm) of the input stage, thus saving power consumption and...
This paper presents the design and simulation of low noise amplifier (LNA) for wireless applications operating in the 2.4–2.5 GHz band. In this paper inductive source degeneration topology has been used to provide low noise figure, high forward gain and low power consumption. The simulation was made using Advance Design System (ADS) software. Proposed work emphasis on reduction in noise figure with...
A low phase noise META-VCO applying meta-structure was designed using 65nm CMOS process. The META-VCO operates 8.45∼8.77 GHz according to VCTRL, and the output power is −19.12 dBm. The measured phase noises are −67.8 dBc/Hz, −96.37 dBc/Hz, and −107.37 dBc/Hz at 100 kHz, 1 MHz, and 10 MHz respectively. The power consumption is 28 mW with 1.2-V supply voltage.
The first integrated duplexer compatible with a −15dBm RX blocker for up to 23dBm TX power is reported. A three winding transformer is driven at the primary by a single ended PA and drives a differential push-pull common-gate LNA. Only 45 dB isolation is required thanks to the 23 dBm RX IIP3 drastically simplifying hybrid balancing and adaptation loop. Cascaded noise figure of duplexer, LNA and base-band...
A test monitor circuit for low-frequency noise characterization is demonstrated in 28nm CMOS technology. The circuit allows a fast evaluation of the low frequency noise performance of transistors, providing a digital output. The VCO-based quantizer used for analog to digital conversion is capable of converting signal of small amplitude, in the μV range. A good agreement between the results obtained...
A 5.2-GHz fully-integrated RF front-end combining the design of a T/R switch, an LNA, and a PA is presented for single-chip solution on CMOS. Based on the concept of circuit co-design, components are properly reused in order to minimize signal losses and chip area. The proposed RF front-end requires no off-chip components while demonstrates an NF of 3.2 dB in the receive mode, and a saturated output...
An Analog Front End (AFE) for a multi-functional environmental sensor is proposed. The IC consists of a 8.2nV/VHz input referred noise, 0.22mm area instrumentation amplifier, a 25aC/√Hz, 0.12mm2 charge amplifier, and a 24bit continuous-time delta-sigma ADC, which are designed with a weak inversion biasing technique. The AFE has been fabricated in a 0.18μm CMOS process with 4.5mm2 die area. The current...
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