The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
As power becomes one of the most important re-sources to provision while building modern HPC systems and applications, it becomes crucial to obtain deeper insights into applications' power and thermal characteristics. There exists aneed to correlate application context with processor-level andsystem-level power and thermal measurements. Existing profilingtools to monitor power and thermal measurements...
Co-design and co-verification of complex SoC requires a virtual platform, which in an ideal case has the single source codes with hardware blocks included. An effective way to do that is using the SystemC language together with high level synthesis technology. Execution of the virtual platform requires simulation of SystemC parts, which is quite time-consuming. We present an approach to accelerate...
As discovered in our previous benchmark works, a small number of workloads in PARSEC benchmark suite suffer from heavy performance loss in a virtual execution environment, of which the major loss exhibits fairly a strong connection with the thread synchronization operations. This paper examines one workload of this kind that makes heavy use of thread synchronization operations, and shows the performance...
This paper surveys virtualization of I/O devices, which is one of the most difficult parts in system virtualization. Current technologies of virtualizing I/O devices include full virtualization, paravirtualization, software emulation and VMM-bypass direct I/O. Optimizations are also done to improve the performance of each technology. Most optimizations used paravirtualization technology for reference...
Interpretation and basic block translation (BBT) are two typical strategies for cold code emulation in a dynamic binary translation (DBT) system. More and more DBT systems employ BBT as the generated native code runs more efficient than the interpretation routines. We observe that BBT's high efficiency is based on those special hardware assists. With certain simple hardware techniques, interpretation...
Systems on a chip (SoC) can draw various benefits such as adaptability and efficient acceleration of compute-intensive tasks from the inclusion of reconfigurable hardware as a system component. Dynamic reconfiguration capabilities of current reconfigurable devices create an additional dimension in the temporal domain. During the design space exploration phase, overheads associated with reconfiguration...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.