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Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient errors during system operation are no longer restricted to memories but also affect random logic, and a robust design becomes mandatory to ensure a reliable system operation. Self-checking circuits rely on redundancy to detect...
Soft errors caused by ionizing radiation have emerged as a major concern for current generation of CMOS technologies and the trend is expected to get worse. Soft error rate (SER) measurement, expressed as number of failures encountered per billion hours of device operation, is time consuming and involves significant test cost. The cost stems from having to connect a device-under-test to a tester for...
In the paper we describe a method to extract the topography of an impressed current for our bounded electrical impedance tomography (bEIT) studies. The frequency of the impressed current is low (up to a few hundred Hz), and is buried in background EEG and other noise. For the development of the extraction method, special consideration is given to maximize the signal-to-noise ratio. The standard lock-in...
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