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Microsystem technology based on micro machining technology and integrated circuit technology has the advantages of miniaturization, integration, intelligence, low cost, high performance, mass production and so on. An overview of the composition and working principle of the microsystem, it introduces the development history of micro system technology, current situation and industrial distribution pattern,...
In the past several decades on-chip dimensions have scaled over 2000X, while dimensions on printed circuit board have scaled 4-5X. This modest scaling of packaging dimensions has severely limited system scaling. To address this, we have proposed a disruptive package-free integration scheme. We replace the traditional organic printed circuit board (PCB) with silicon interconnect fabric (SiIF) and replace...
In this paper, a new LDMOS on silicon-on-insulator (SOI) with homo-type fixed interface charges in the bottom of field oxide layer is proposed. The surface electric field can be improved by adding the fixed interface charges and optimizing the doping profile, which can effectively modulate electric field to obtain the optimization trade-off between the breakdown voltage and on-resistance. The numerical...
2.1D package technology (chip on substrate) as a potential low cost solution for 2.5D silicon interposer package (chip on wafer on substrate), we develop here a panel type manufacture organic interposer (scheme 1). 2.1D technology focus on the production cost and the ball count range which defined by line/space. We presents the demonstration of high resolution photolithography semi-additive processes...
Gallium Nitride, in the form of epitaxial HEMT transistors on silicon carbide substrates is now almost universally acknowledged as the replacement for silicon bipolar, power MOSFET, high power devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-SiC based MMIC's which enable state-of-the-art high frequency performance and bandwidth to be extended into Ku-Band and Ka-Band...
High-density packaging of fast-switching power semiconductors typically requires low thermal resistance and parasitic inductance. High-density packaging of high-voltage semiconductors, such as 10 kV SiC MOSFETs, has the added challenge of maintaining low electric field concentration in order to prevent premature dielectric breakdown. This work proposes a wire-bond-less, sandwich structure with embedded...
This work presents a study of the changes in the optical, morphological and compositional properties of SiOC thin films obtained by hot wire chemical vapor deposition (HWCVD) technique. A mixture of hydrogen (H2), oxygen (O2) and monomethyl-silane (MMS) was used as reactant gas, which was passed through a tantalum filament (Ta) in order to be decomposed and obtained the film. Changes were made in...
In this study, the influence of a temperature annealing process on the crystallographic orientation and sheet resistance of Pt/Ti films is investigated. Varying parameters are the annealing temperatures ranging between 450°C and 700°C and the atmosphere of the annealing process, which consists of either air, forming gas and argon gas. The thickness of the Pt/Ti film and the time of the annealing process...
In this paper, a 60 GHz CMOS on-chip dipole antenna with loss-reduced silicon substrate, which had been proposed and simulated by the authors, was measured and gain improvement of approximately 9 dB was obtained. In the antenna, rectangular region with 500 μm × 1000 μm around the dipole is irradiated by proton and conductivity is reduced from 10 S/m (10 Ω cm) to 0.1 S/m (1 kΩ cm). Antenna gain of...
Metal-insulator-semiconductor capacitors used as a RC snubber attenuate voltage overshoots which may occur during switching phases. These devices feature good temperature stability up to 200°C and can be integrated very close to power switches on the same transfer substrate. As the capacitors need to withstand high voltages in most applications, thick dielectric layers have to be used, causing significant...
We present a new bonding process for gallium nitride (AlGaN/GaN) devices from Si onto diamond substrates. In our technology AlGaN/GaN-devices are transferred from silicon (Si) onto single (SCD) and polycrystalline diamond (PCD) substrates by van der Waals bonding. Load-pull measurements on Si and sCd at 3 GHz and 50 V drain bias show comparable power-added-efficiency (PAE) and output power (Pout)...
In this paper antenna on silicon is presented. This paper proposes design of micro strip antenna on silicon with improved bandwidth. Proposed antenna is for X-band frequency. To improve bandwidth, ground defect being created on silicon substrate. With this we are improve bandwidth by 4–8 times. Designed verified both in HFSS simulation tool and on VNA after fabricating device.
We have demonstrated packaging of a silicon photonic chip with polymer multimode waveguides on a package substrate in a face-up electro-optic 3D integration scheme. The optical loss at the die-to-package interface in O-band was measured to be 7.6dB, which agrees well with simulation.
InAlGaAs/InP p-i-n photodiodes epitaxially grown on silicon substrate with a dark current density as low as 1.3 mA/cm2 at −3 V are demonstrated. Responsivity, bandwidth, and output power at 1-dB compression are 0.76 A/W, 8 GHz, and −3.4 dBm, respectively.
Charge trapping properties of Al-ZrO2/Al2O3/ZrO2-SiO2-Si structures were investigated in attempt to elucidate the instability in their C-V hysteresis. The hysteresis in these structures is mainly due to subsequent trapping of electrons and holes injected from the Si substrate. However the competitive process of electron injection from the gate accompanied by the high leakage introduces instability...
Two-dimensional crystals of Graphene Oxide (GO) were synthesized by modified Hummers method: flakes of specific lateral size 1–2 μm were obtained as a stable aqueous suspension. The size of GO flakes can be controlled via initial graphite powder grain size as well as via respective filtration or centrifugation of the GO solution. The concentration of GO in the solution can be varied between 4 mg/mL...
Due to its potential applications in optoelectric area, WS2/graphene heterojunction attracts much attention in past years. But until now, modulation of their working performance is still a big challenge for the researchers. In this work, WS2/graphene heterojunctions have been sucessfully fabricated on Si substrate. Moreover, their surface configuration were researched by STM and AFM techniques. Finally,...
We report 1300 nm continuous wave lasing on an on-axis GaP/Si (001) virtual substrate operating up to 60°C with record low threshold current of 27 mA. Ridge and broad area lasers were fabricated with seven layers of p-modulation doped quantum dots and as-cleaved facets.
III-V semiconductor heterostructures grown on GaSb and InAs substrates are widely used to produce high performance optoelectronic devices operating in the technologically important mid-infrared spectral range. However, these substrates are expensive, only available in small sizes and have low thermal conductivity. Integration of III-Vs onto silicon substrates offers the opportunity to overcome these...
In this work, the characteristics of a Si-solar cell (PV) model is studied. The proposed modelis a four layer system with an ultra-thin film of Fe-InGaAsPlaid above Silicon (Si) substrate and covered by AlON layer that is exposed to air directly. The efficiency is measured by the reflectance power (R) and transmittance power (T). R and T are derived by using the transfer matrix method for both TE...
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