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Linear feedback shift register (LFSR) is an important part of the cyclic redundancy check (CRC) operations and BCH encoders. This paper presents a novel high speed parallel LFSR architecture based on parallel Infinite Impulse Response (IIR) filter design, pipelining and retiming algorithms. A new formulation is proposed to modify the LFSR into the form of an IIR filter. Then pipelining and retiming...