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We developed a 20 nm gate process using SiO2/Si3N4 bilayer sloped etching. Selective and sloped etching of bilayer makes this technology realizable. A HEMT with this technology has merits of fine length definition beyond the limit of electron beam (E-beam) lithography system. Using this technology, we experimentally demonstrated that a 20 nm gate length from initial 50 nm line pattern. The fabricated...
We build on previous work and present the first experimental demonstration of a completely programmable NML majority gate. To ensure complete programmability, each driver magnet will need to be set independently. This can be accomplished by changing magnet aspect ratio. As the length of the magnet increases along its easy axis, its coercivity in that direction increases. Thus, it will require a higher...
Fine patterning technologies - e-beam lithography, SPT (spacer patterning technology) and SaDPT (self aligned double patterning technology)-have been introduced to develop a single unit of nano-scale MOSFET. However, in order to achieve manufacturable high density NAND Flash memories, the merits and demerits of each technology should be considered in three points of view: device characteristics, process...
Gallium nitride based HEMTs are a promising technology for high voltage, high power, high frequency applications. In addition to the potential for high operating voltage, this technology may also be suited for applications that utilize modulation of the drain voltage to improve overall amplifier efficiency. RFMD has developed a GaN HEMT technology platform on semi-insulating SiC substrates. This technology...
Influence of each process for gate LER has been studied and evaluated by 3D AFM. From the result, PR LER was found to be larger than any other process and major cause of LER formation. As another possible parameter, effect of poly-Si material has been also evaluated. It provided that LER was closely related to number of grain boundaries of poly-Si. The mechanism of LER formation by grain boundary...
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