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Modern HPC systems are constructed by placing more and more cores in a single machine. To utilize this kind of machines efficiently, many parallel processes have to be used. The performance analysis of massively parallel program runs becomes more and more complicated as the number of events that are generated while the program is traced grows linearly with the number of processes. In order to utilize...
In this paper,we discuss the quantitative extensions of event structures for LOTOS with stochastic nature. We give the non-interleaving semantics model for interactive Markov chains algebra(IMCA).It is shown that our stochastic models can be used to provide a compositional causality-based semantics to IMCA, and a event-based operational semantics is provided that is proven to coincide with various...
First failure data capture (FFDC) is a technology that is used to capture diagnostic information when errors occur. This information reduces the need to reproduce errors. FFDC involves all firmware components. The processes and techniques of FFDC are crucial to the success of an embedded system. With a good FFDC implementation, software engineers can collect diagnostic data quickly and fix defects...
The processing power and memory capacity of independent and heterogeneous parallel machines can be combined to form a single parallel system that is more powerful than any of its constituents. However, achieving satisfactory application performance on such a metacomputer is hard because the high latency of inter-machine communication as well as differences in hardware of constituent machines may introduce...
Dynamic analysis has long been a subject of study in the context of (compiler) optimization, program comprehension, test coverage, etc. Ever-since, the scale of the event trace has been an important issue. This scalability issue finds its limits on the computational front, where time and/or space complexity of algorithms become too large to be handled by a computer, but also on the cognitive front,...
Performance assessment of embedded HW/SW systems built with various types of VLSI components, i.e. heterogeneous multi-processor architectures, is important to help the development of complex real-time applications. To design such a tool, two issues must be solved: the gathering of relevant information simultaneously on several components without disturbing the application behavior, display of the...
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