The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This introduction presents an overview of the concepts discussed in this book. The book is focused on the fundamental aspects of analysis, modeling, and design of digital control loops around high‐frequency switched‐mode power converters in a systematic and rigorous manner. This chapter introduces the topics covered in the book and to motivate the reader to pursue the theoretical and practical concepts...
Basically this paper focuses on hardware and software interfacing for robot arm controller application. The purpose of this project is to design and build a control system for position control for robot arm with an FPGA chip. This is closed loop control system. In which Controller, Drive circuits and the Sensor circuit plays important role. Plus Width Modulation (PWM) is used to control the speed...
Real-time simulation of PMSM drives enables thorough testing of control strategies & software protection routines and therefore allows rapid deployment of vehicular or industrial applications. The proposed PMSM model is a phase domain model with sinusoidal flux induction. A 3-phase IGBT inverter drives the PMSM machine. Both models are implemented on an FPGA chip, without any VHDL coding, with...
This paper presents an optimized sinusoidal pulse width modulation (SPWM) technique to control single phase matrix converter (SPMC) desirable for implementation in application specific integrated circuit (ASIC) or field programmable gate array (FPGA). The use of VHDL coding makes it adaptable for other design applications. The result provides an area-efficient architecture for effective design.
The current paper discusses a design approach for Intelligent vehicle black box system with vehicle networking. It is also proposed that the system will consists of intelligent router (based on LIN or Flex-ray) which on activation will execute for authentication & validation. After confirmation it will form packets of emergency data depending upon rise & kind of emergency situation. The data...
In this work, we have compared three different methodologies for the implementation of a FFT/IFFT module on FPGA: VHDL coding (VC), System-level tools at RT level (STR), and System-level tools at macroblock level (STM). In terms of resource usage and operation frequency, STM has obtained interesting results, although it has an important restriction about internal data width which produces a mean output...
SEA is a scalable encryption algorithm targeted for small embedded applications. It was initially designed for software implementations in controllers, smart cards, or processors. In this letter, we investigate its performances in field-programmable gate array (FPGA) devices. For this purpose, a loop architecture of the block cipher is presented. Beyond its low cost performances, a significant advantage...
This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive based on a finite- element analysis (FEA) method and implemented on an FPGA card for HIL testing of motor drive controllers. The proposed PMSM model is a phase domain model with inductances and flux profiles computed from the JMAG-RT finite element analysis software. A 3-phase IGBT inverter drives the PMSM...
In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP core. The main objective is to design a configurable optimized core that can be integrated as a standard peripheral of a microprocessor system. Thus, three different methodologies have been compared: VHDL coding, System-level tools at RT level, and System-level tools at macroblock...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.