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A highly integrated 4.9–5.9 GHz single chip front-end IC (FEIC) is presented, which is based on SiGe BiCMOS, realized in a 1.6 mm2 chip area and in an ultra-compact 1.7 × 2.0 × 0.33 mm3 package. The Tx chain has >30 dB gain and meets −40 dB DEVM up to Pout of 15 dBm and −35 dB DEVM up to Pout of 17 dBm with a 3.3 V supply, insensitive to modulation bandwidths and duty cycle. The ultra-low back-off...
A compact high linearity 4.9–5.9 GHz T/R FEM is presented, which consists of a SiGe BiCMOS PA and a SOI switched LNA realized in an ultra-compact 2.3 × 2.3 × 0.33 mm3 QFN package. The Tx chain has > 30 dB gain and meets −35 dB DEVM up to 17 dBm at 3.3 V and 20 dBm at 5V, insensitive to modulation bandwidths and transmission data length up to 4 mS. With digital pre-distortion (DPD), the PA can be...
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