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We have fabricated high-performance self-aligned top-gate InGaZnO TFTs with novel silicon-like source and drain (S/D) parasitic resistance (RSD) reduction processes. Ar ion implantation (Ar I/I) formed S/D extension layers and reduced RSD by inducing high-density carriers. First demonstration of self-aligned S/D metallization processes on InGaZnO surface (In-Ti alloy formation), just like silicidation,...
In this paper, two factors have been considered which may influence the diameter of tin whisker. One is coating crystal structure around the root of tin whisker; another is crack size in oxide films. For the first factor, four samples have been prepared and uniform conditions to storage are provided. Images from SEM (Scanning Electron Microscope) and EDX (Energy Dispersive X-ray Detector) show that...
TiN diffusion barrier layers were deposited on SiO2/Si substrate by ALD method that employed TiCl4 and NH3 as the source and reactant gases, respectively, at a temperature range between 350°C and 500°C. Properties of films, including deposition rate, resistivity, surface roughness and chemical composition, were investigated, and performance of TiN diffusion barrier layer was also verified. Deposition...
Novel 3D stacked gate-all-around multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32 nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low IOFF (< 20 pA/mum) and high ION (> 2.2 mA/mum) were demonstrated. Moreover, those transistors do not suffer...
The selection of lead-free tin based surface finishes resulting from government regulation of lead has reintroduced, into the spotlight, the reliability concern due to the possible formation of electrically conductive tin whiskers. This paper reviews risk mitigation studies including use of tin alloys, conformal coating, electroplating techniques, surface treatment, annealing, and use of under-layer...
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