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Due to the growing size of compute clusters, large scale parallel applications increasingly have to deal with hardware malfunctions and other failure scenarios during execution. The overall goal of this research is to get good performance of MapReduce applications despite failures. The paper focuses on evaluation of the performance of two representative Hadoop MapReduce applications, 'WordCount' and...
A Distributed File System (DFS) is a system where the files are stored and distributed on different computers connected via a communication network. The FlexA is a DFS integrated into the user space with fault tolerance, security, scalability and flexibility features. However, FlexA has limitations in the development of new resources to the system. This work made the reengineering of the FlexA aspects...
Complex systems design requires a time-consuming verification process in support of the safety and maintenance requirements. In this paper, we describe an integrated verification flow of system requirements as well as system fault behaviors and fault-tolerant properties. The process converts XML-based architectural descriptions into SystemC simulation modules tied to predefined libraries. Flexible...
Workload allocation in embedded multicore platforms is an increasing challenging issue due to heterogeneity of components and their parallelism. Additionally, the impact of process variations in current and next generation technology nodes is becoming relevant and cannot be compensated at the device or architectural level. Intra-die process variations raising at the core level and platform level makes...
The implementation of devices or sensors developed over open source electronic platforms is a very important key of the projects aiming for promoting concepts such as Internet of things and Smart Cities. Due to the heterogeneity of these projects and especially the lack of a standard to regulate the communication process between the sensors and the application server, taking into account that many...
System Verilog Assertions (SVA) is widely used by hardware designers and verification engineers to apply Assertion Based Verification (ABV) methodology on their hardware designs. However, the complexity in understanding different protocol standards in general and JEDEC memory protocol standards in specific imposes numerous difficulties on designers and verification engineers when translating design...
Based on hardware and software integration testing and model driven testing binding requirements, we propose a model based on the needs of embedded software driver initial framework to analyze and identify the needs of embedded systems hardware and software object creation object interaction model, then the model analysis and testing constraints and on the basis of test scenarios, and then establish...
In this paper, an ontology-based approach to automatically generate control applications to handle diagnostic information of decentralized control devices is presented. Diagnostic possibilities of modern remote I/O devices are analyzed and software components in terms of function blocks to handle the specific diagnostic information are defined. After a detailed conceptual overview, the application...
The impact of process variations and wear-out mechanisms in current and next generation technology nodes is becoming relevant and cannot be compensated at the device or architectural level. Intra-die process variations raising at the core level and platform level makes parallel multicore platforms intrinsically heterogeneous, because the various cores are clocked at different operational frequencies...
We propose directive-based automatic code generation for a multiple-precision code from a C code with double precision. The multiple-precision code uses the GNU Multiple Precision Arithmetic Library (GMP). Our code generation functions can be separated into binary operations by automatically creating a temporary variable, transforming C mathematical functions into corresponding GMP functions, and...
In the present industrial field real-time data acquisition system, there are some major performance problems in Ethernet for real-time communication. Such as bandwidth utilization, synchronous accuracy, delay switch. Now, EtherCAT can effectively improve the performance problems about Ethernet real-time communication which those have discussed above. In industrial field, it is very important for data...
Design and development of complex systems require collaborative efforts of multiple individuals. Availability and usage of formal approaches to specify designed components is essential for their successful completion and application. Usage of specification languages addresses such needs. In the domain of fuzzy systems an XML-based specification language called Fuzzy Markup Language (FML) has been...
Contemporary devices for playing of video and audio signal from DVB bitstreams use complex hardware structure due to high requirements specified by standards like Hybrid Broadcast Broadband TV (HbbTV). The main focus of this paper is the proposal of a software that runs on set-top boxes (STBs). Instructions and attributes for STBs are contained in Extensible Markup Language (XML) and therefore XML...
Process of development complex electronic control units (ECUs) is usually complex and requires several iterations (releases). After each iteration, it is necessary to perform detailed testing and verification of all components in a testing environment that is as similar as possible to the real system. For this kind of testing it is recommended to use the automated testing environment that generates...
Complex SoC design devote a great part of the developing time to module integration tasks. The necessity of automating system integration at high-level has yield to the development of module description languages like IP-XACT. However, the available options today still lack advanced parametrization capabilities needed to design complex systems with very heterogeneous IP-cores and module providers...
This paper presents ROSMOD, a model-driven component-based development tool suite for the Robot Operating System (ROS). ROSMOD is well suited for the design, development and deployment of large scale distributed applications on embedded hardware devices. We present the various features of ROSMOD including the modeling language, the graphical user interface, code generators and deployment infrastructure...
Generating and managing input data for large-scale scientific computations has, for many classes of application, always been a challenging process. The emergence of new hardware platforms and increasingly complex scientific models compounds this problem as configuration data can change depending on the underlying hardware and properties of the computation. In this paper we present TemPSS (Templates...
The hardware layer of the Si elegans EU FP7 project is a massively parallel architecture designed to accurately emulate the C. elegans nematode in biological real-time. The C. elegans nematode is one of the simplest and well characterized Biological Nervous Systems (BNS) yet many questions related to basic functions such as movement and learning remain unanswered. The hardware layer includes a Hardware...
The Vienna Neural Network Specification Language (ViNNSL) is an XML based domain specific language for the description of neural network objects. It proved very well as communication framework in service-oriented architecture based neural network simulation environments, as N2Sky. N2Sky is a virtual organization (VO) environment based on the sky computing paradigm. It allows the creation, training,...
Programmable Logic Controllers (PLC) are key components in modern packaging automation systems. But their success has led to the presence of a broad range of brands and models, each one with its own and unique features, but also with its own environment for software development. This situation has some major drawbacks: it is very difficult to upgrade an installation by changing the PLC, maintenance...
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