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eTPU is a state-of-the-art timing co-processor unit that aims to relief I/O processing in new advanced microcontroller units. It has characteristics of both a peripheral and a processor, which are tightly integrated, requiring a verification strategy that covers equally well both of these roles. This paper discusses the formal verification effort of some specific eTPU features. For newer versions...
Multi-core SoC created great opportunities to increase overall system performance while keeping the power in check but also created many design challenges that designers must now overcome. The challenge of doubling performance every two years used to drive superscalar design with more functional units running concurrently or deeper pipeline racing for highest frequency at the cost of higher power...
The ever changing demands on computational resources has information systems managers looking for solutions that are more flexible. Using a ldquobigger boxrdquo that has more and faster processors and permanent storage or more random access memory (RAM) is not a viable solution as the system usage patterns vary. In order for a system to handle the peak load adequately, it will go underutilized much...
This paper addresses the problem of how to adapt an algorithm designed for fixed topology networks to produce the intended results, when run in a network whose topology changes dynamically, in spite of encountering topological changes during its execution. We present a simple and unified procedure, called a reset procedure, which, when combined with the static algorithm, achieves this adaptation....
We address the graph isomorphism problem and related fundamental complexity problems of computational group theory. The main results are these: A1. A polynomial time algorithm to test simplicity and find composition factors of a given permutation group (COMP). A2. A polynomial time algorithm to find elements of given prime order p in a permutation group of order divisible by p. A3. A polynomial time...
A network is a graph with numeric parameters such as edge lengths, capacities, costs, etc. We present efficient algorithms for network problems that work by scaling the numeric parameters. Scaling takes advantage of efficient nonnumeric algorithms such as the Hopcroft-Karp matching algorithm. Let n, m and N denote the number of vertices, number of edges, and largest numeric parameter of the network,...
It is generally recognized that asynchronous operation of logic networks offers specific advantages over synchronous operation controlled by a central clock when the network is subject to large or widely varying inter-module propagation delays. In this paper we characterize several previously described techniques for achieving asynchronous operation by a single model. Essential to the model is the...
The inherent problems of data transmission in a strictly feedforward line have been discussed in the literature. In such a line, where the stored data are indexed forward by control pulses moving in a direction away from the data source, if time variations exist in the delays of successive stages then there is always a nonzero probability that two successive control pulses will eventually appear at...
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