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This paper describes a methodology for building a reliable internet core router that considers the vulnerability of its electronic components to single event upset (SEU). It begins with a set of meaningful system level metrics that can be related to product reliability requirements. A specification is then defined that can be effectively used during the system architecture, silicon and software design...
In this paper, we propose a robust STBC transmission scheme to combat the timing synchronization errors over frequency-selective multiple-access channels. First, the equivalent channel model in the presence of timing synchronization errors is derived and we find that the synchronization errors result in an equivalent channel model with larger number of correlated channel taps. Based on this correlated...
This paper addresses the problem of how to adapt an algorithm designed for fixed topology networks to produce the intended results, when run in a network whose topology changes dynamically, in spite of encountering topological changes during its execution. We present a simple and unified procedure, called a reset procedure, which, when combined with the static algorithm, achieves this adaptation....
This work applies the theory of knowledge in distributed systems to the design of faulttolerant protocols for problems involving coordinated simultaneous actions in synchronous systems. We give a simple method for transforming specifications of such problems into high-level protocols programmed using explicit tests of whether certain facts are common knowledge. The resulting protocols are optimal...
It is generally recognized that asynchronous operation of logic networks offers specific advantages over synchronous operation controlled by a central clock when the network is subject to large or widely varying inter-module propagation delays. In this paper we characterize several previously described techniques for achieving asynchronous operation by a single model. Essential to the model is the...
The inherent problems of data transmission in a strictly feedforward line have been discussed in the literature. In such a line, where the stored data are indexed forward by control pulses moving in a direction away from the data source, if time variations exist in the delays of successive stages then there is always a nonzero probability that two successive control pulses will eventually appear at...
This paper summarizes some rather extensive research on the problem of constructing logic nets out of elements whose timing causes trouble either in their slowness or in their lack of precision. The problem is made precise by setting up a theory of logic nets that is abstract but realistic. Its abstractness consists in its lack of similarity to any particular hardware, and in its strictly mathematical...
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