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In this article we discuss three challenges of device verification and test for high-speed interfaces, with special focus on latest memory device interface generations as DDR3 / GDDR5 / XDR working in the GHz clock frequency range. We address how efficient device verification in terms of reaching target coverage fast can be achieved through random methods on ATE, both random operating condition tests...
Networks on chips (NoCs) provide a mechanism for handling complex communications in the next generation of integrated circuits. At the same time, lower yield in nano-technology, makes self repair communication channels a necessity in design of digital systems. This paper proposes a reliable NoC architecture based on specific application mapped onto an NoC. This architecture is capable of recovering...
In this paper we propose a set of different configurations of failure recovery schemes, developed for network-on-chip (NoC) based systems. These configurations exploit the fact that communication in NoCs tends to be partitioned and eventually localized. The failure recovery approach is based on checkpoint and rollback and is aimed towards fast recovery from system or application level failures. The...
This paper describes a methodology for building a reliable internet core router that considers the vulnerability of its electronic components to single event upset (SEU). It begins with a set of meaningful system level metrics that can be related to product reliability requirements. A specification is then defined that can be effectively used during the system architecture, silicon and software design...
Considering the high packet losses and low, varying bandwidth of GPRS/EDGE network and limited computation power of handheld devices, we present and implement a novel SVC video-on-demand system for hand-held devices over GPRS/EDGE network. For the purpose of handling varying bitrate, we propose a priority based layer switching (PLS) adaptation scheme for SVC stream, which not only performs online...
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