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This paper presents a proposal of MOSFETs series and parallel connections. This configuration allows the increase of maximum operating voltage and current values in these circuit breakers. The unbalance compensation method is performed at the side gate from a single active driver circuit. The mathematical formulation is done and the results are validated through simulation. The main advantages and...
Railways in many countries are supplied by 3 kV DC voltage. An electrical insulation between the high voltage and the consumer side at the basis of a medium frequency transformer using 6.5 kV IGBT modules is a recurring theme of a number publications. An auxiliary power converter (APC) for locomotives with output power of 100 kW surviving external actions and interior faults, having improved energy...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
A new low-jitter polyphase-filter-based frequency multiplier incorporating a phase error calibration circuit to reduce the phase errors is presented. Designing with a multiplication ratio of eight, it has been fabricated in a 0.13-mum CMOS process. For input frequency of 25 MHz, the measured jitter is 2.46 ps (rms) and plusmn9.33 ps (pk-pk) at 200-MHz output frequency, while achievable maximum static...
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