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This work realises a memory-efficient embedded automatic speech recognition (ASR) system on a resource-constrained platform. A buffering method called ultra-low queue-accumulator buffering is presented to efficiently use the constrained memory to extract the linear prediction cepstral coefficient (LPCC) feature in the embedded ASR system. The optimal order of the LPCC is evaluated to balance the recognition...
In this paper, we propose an approach for detecting line segments in real-time by merging fixed-size short line segments. In many hardware systems, a Hough Transform has been used for detecting line segments. The Hough Transform is robust to noises, but it requires large memory space, and more space is required for images with higher resolution. Line detection is a primitive task which is frequently...
Solid State Drives (SSD's) have shown promise to be a candidate to replace traditional hard disk drives, but due to certain physical characteristics of NAND flash, there are some challenging areas of improvement and further research. We focus on the layout and management of the small amount of RAM that serves as a cache between the SSD and the system that uses it. Of the techniques that have previously...
This paper presents the implementation of the mapper block in a faster-than-Nyquist (FTN) signaling transmitter. The architecture is look-up table (LUT) based and the complexity is reduced to a few adders and a buffer to store intermediate results. Two flavors of the architecture has been designed and evaluated in this article, one, a register based implementation for the buffer and the other using...
To meet the complex requirements of the miniature embedded integrated (INS/GPS) navigation system based on DSP, all peripheral circuits were integrated in single chip of FPGA, such as logic control module, serial/parallel data conversion and FIFO(First In First Out), etc. The multi-channel UART(Universal Asynchronous Receiver Transmitter) consists of the data conversion circuit and FIFO. In addition,...
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