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Cost has been a major driving force in the development of the flash-memory technology. Because of this, serious challenges are now faced for future products on reliability and performance requirements. In this work, we propose a management strategy to resolve the reliability and performance problems of many flash-memory products. A three-level address translation architecture with an adaptive block...
This paper presents a design and partial implementation of an embedded system as a part of neural-machine interface (NMI) for neural-controlled artificial legs. We have designed a circuit consisting of 30 analog inputs for sampling signals from 16 EMG (Electromyography) electrodes, a 6 degrees of freedom (DOFs) load cell, 5 force sensitive resistors (FSR), and 3 goniometers. The amplified signals...
Flash memory is a kind of common storage device. Its characteristics of flexibility, low power, and so on offer excellent qualifications for embedded system and mobile system. But flash memory must be written after erasure operation, and the most important thing is that the erasure operation times are very limitable. For assurance of long time availability, data must be distributed over all memory...
A 0.35 mum double-poly CMOS 16 b SAR A/D converter uses self-calibration techniques to obtain frac12 LSB INL. The differential and single-ended THD at 1Msample/s are 101dB and 96 dB, respectively. Each ADC consumes 20 mW at 3 V and occupies 2.9 mm2 active area, resulting in a 0.9 pJ/b FOM. The chip includes 3 ADCs, 2 DACs, 8051-microcontroller, CAN controller, DMA controller, 64 K flash memory and...
The magnetic random access memory (MRAM) is considered one of the potential candidates that will replace current on-chip memories (RAM, EEPROM, and flash memory) in the future. The MRAM is fast and does not need a high supply voltage for read/write operations. It can also endure almost unlimited read/write cycles. These combined advantages of RAM and flash memory make it a potential choice for SOC...
This paper proposes an architecture for real-time large vocabulary speech recognition on a mobile embedded device. The speech recognition system is based on Hidden Markov Model (HMM), which involves complex mathematical operations such as probability estimation and Viterbi decoding. This computational nature makes it power hungry and realtime recognition is not achieved by porting software solutions...
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