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This paper describes the memory architecture to improve the data transfer and storage in a small satellite. The main objective during the design stage of the architecture is to find a good balance between power consumption, cost, reliability and data processing capability. These variables directly impact each other, and it is important to achieve a suitable balance. For this, a low power flash memory...
The reliability of advanced embedded non-volatile memories has been discussed using the 2T-FNFN devices example. The write/erase endurance and the data retention are the most important reliability parameters. The intrinsic reliability mechanisms can be addressed through single cell evaluation, while the cell-to-cell variation determines the product level reliability. The cell-to-cell variation can...
We present a split-gate based NOR flash memory array with silicon nanocrystals as the storage medium. 128 KB memory arrays have been evaluated with this technology and the results presented here show a nanocrystal memory that has been demonstrated to achieve a minimum 1.5 V operating window that is maintained through 10 K program/erase cycles; well controlled array threshold distributions; fast source-side...
The Department of Electronic Engineering of Beijing Institute of Technology is integrating emerging interconnect technologies with other high-performance technologies to meet the demanding requirement of future, real-time signal processing applications. For next-generation, scalable, modular and adaptable signal-processing system, a universal, flexible and high-performance signal processing module...
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