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Domain Wall Memory (DWM) with ultra-high density and comparable read/write latency to DRAM is an attractive replacement for CMOS-based devices. Unlike DRAM, DWM has non-uniform data access latency that is proportional to the number of shift operations. While previous works have demonstrated the feasibility of using DWM as main memory and have proposed different ways to alleviate the impact of shift...
In this study, commercial 512 Mb Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) modules from three progressive technologies - 130 nm, 110 nm and 90 nm - were selected for experimentation to investigate degradation trends as a function of scaling. High temperature, high voltage accelerated stress testing was performed to characterize DRAM reliability and failure rates. Retention...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
A fast macroblock mode selection algorithm based on inter-view global disparity is proposed to improve the encoder efficiency of JMVM, with insignificant degradation in picture quality and bit rate increase. The proposed fast mode selection algorithm promotes the encoding speed through partly searching method when encoding most of the frames in multiview video sequence. The macroblock mode of current...
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