The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper discusses accelerated degradation failure problem of the electronic products, and puts forward the accelerated degradation data statistical model based on first passage time. Then the model with the computer simulation is verified.
In this study, commercial 512 Mb Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) modules from three progressive technologies - 130 nm, 110 nm and 90 nm - were selected for experimentation to investigate degradation trends as a function of scaling. High temperature, high voltage accelerated stress testing was performed to characterize DRAM reliability and failure rates. Retention...
The reliability of advanced embedded non-volatile memories has been discussed using the 2T-FNFN devices example. The write/erase endurance and the data retention are the most important reliability parameters. The intrinsic reliability mechanisms can be addressed through single cell evaluation, while the cell-to-cell variation determines the product level reliability. The cell-to-cell variation can...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
Simple ring-oscillator circuit has been used to estimate the degradation in circuit performance due to negative bias temperature instability (NBTI) effect but it fails to isolate the degradation from the NBTI for PMOS and the positive bias temperature instability (PBTI) for NMOS in high-K dielectric/metal gate CMOS technology. In this paper, we propose new circuit structures which monitor the NBTI...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.