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A high-precision low-voltage low dropout regulator (LDR) using adaptive biasing to extend the loop bandwidth is proposed for system-on-chip power management applications. The multi-stage output-capacitor-free LDR is stabilized by miller compensation and Q-reduction technique to reduce the requirement of minimum load current. By using direct current feedback from a simple current mirror, the adaptively-biased...
A CMOS low dropout regulator (LDR) with high power supply rejection (PSR) and without large output capacitor is proposed for system-on-chip (SoC) power management applications. By cascoding a power NMOS with the PMOS pass transistor, high PSR over a wide frequency range is achieved. The gate drive of the cascode NMOS is controlled by an auxiliary LDR that draws only 1 ??A from a small charge pump,...
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