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Keypoint matching between images is an important technique for computer vision applications such as image retrieval. Although binary feature descriptors such as BRIEF enable fast measurement of distance, exhaustive search is still time-consuming. Hashing methods such as Locality Sensitive Hashing (LSH), while being effective to accelerate searching, result in large memory consumption and thus are...
In this research, we propose a heterogeneous anomaly-based intrusion detection system (HA-IDS) which is built on both of Field-Programmable Gate Array (FPGA) and Graphics Processing Unit (GPU) platforms. An essential anomaly-based IDS comprises of the two main components: Feature Construction Module (FC) to extract and collect network header information, and Classification Module (CM) to categorize...
This paper describes FPGA implementation of object recognition processor for HDTV resolution 30 fps video using the Sparse FIND feature. Two-stage feature extraction processing by HOG and Sparse FIND, a highly parallel classification in the support vector machine (SVM), and a block-parallel processing for RAM access cycle reduction are proposed to perform a real time object recognition with enormous...
Image is a visual representation of object, or a scene which can be seen by human eyes. Image can be created and stored in electronic form. Image is a two dimensional function f(x, y) where, x and y are spatial co-ordinates and amplitude of images is defined in intensity level of each pixel. Image fusion means merging relevant information from different images to create one new image which is more...
A system-on-chip field gate programmable array (FPGA)-based video processing platform for human detection in complex scenes is presented. This study details the hardwarebased implementation of a human detection algorithm in 2D/3D scenes, including the capture, video processing, and display stages. The proposed method is implemented by extending a previously proposed method that uses features extracted...
This study proposes a system-on-a-chip, field-programmable gate array (FPGA)-based real-time video processing platform for human action recognition. We provide the details of a hardware implementation for real-time human activity recognition in 3D scenes, including capture, processing, and display. The proposed platform is implemented by adding a two-stage preprocessing step to improve the results...
A real-time hardware architecture based on scale-invariant feature transform algorithm (SIFT) feature extraction with parallel technology has been introduced in this paper. The proposed parallel hardware architecture could be able to extract feature via a Field-Programmable Gate Array (FPGA) chip efficiently, which provided the real-time performance and the similar accuracy with software implementation...
Pedestrian detection is a challenging work in advanced driver-assisted systems (ADAS) for autonomous vehicles. Among many feature extraction algorithms, histograms of oriented gradients (HOG) has been widely used for pedestrian detection. However, the original HOG involves complicated arithmetic operations and requires large buffers to store the extracted features. In this paper, we propose several...
In this paper, we present the first multilevel implementation of the Harris-Stephens corner detector and the ORB feature extractor running on FPGA hardware, for computer vision and robotics applications. ORB is a fundamental component of many robotics applications, and requires significant computation. The design has been validated both in behavioural simulation and in implementation on an Arria V...
In recent years, Convolutional Neural Networks (ConvNets) have become the quintessential component of several state-of-the-art Artificial Intelligence tasks. Across the spectrum of applications, the performance needs vary significantly, from high-throughput image recognition to the very low-latency requirements of autonomous cars. In this context, FPGAs can provide a potential platform that can be...
Fine-grained runtime power management techniques could be promising solutions for power reduction. Therefore, it is essential to establish accurate power monitoring schemes to obtain dynamic power variation in a short period (i.e., tens or hundreds of clock cycles). In this paper, we leverage a decision-tree-based power modeling approach to establish finegrained hardware power monitoring on FPGA platforms...
Efficient detection and reliable matching of image features constitute a fundamental task in computer vision. When real-time operation is required, the solution to this problem becomes a real challenge, because of increased processing requirements. Scale Invariant Feature Transform (SIFT) is considered as a stable and robust algorithm for the extraction of invariant features, however special hardware...
This paper presents a tool-supported flow for exploring the design space of an FPGA-based application, which is the Scale-Invariant Feature Transform (SIFT), a common image feature detection algorithm used as key component in computer vision tasks such as advanced driver assistance systems (ADAS). The proposed system is based on a dedicated hardware accelerator tightly coupled to a soft-core VLIW...
Pedestrian detection is a vital function of the emerging autonomous vehicle industry. HOG is widely used as the feature extractor for pedestrian detection thanks to its high accuracy despite the fact that it is computationally expensive. Hardware accelerators using GPUs or FPGAs are used in several proposals to address its real-time execution. There is always a trade-off between real-time processing,...
Patients with epilepsy (a central nervous system disorder) suffer from frequent seizures that occur at unpredictable times without any warning. Therefore, it is necessary to identify the occurrence of seizure in an epileptic patient and prevents patients from SUDEP (SUDDEN UNEXPLAINED DEATH IN EPILEPSY). Prediction of epileptic seizure through analysis of scalp EEG signal which is the measure of the...
Health care is changing the focus from primary and specialty care to prevention and wellness. Therefore, home health care is seen as one of the most relevant wellness services due to high accessibility and low cost of diagnosis. The growth relevance given to the sleep related disorders, due to the high importance of sleep in our lives, is specifically significant in this context encouraging the development...
Health care is changing the focus from primary and specialty care to prevention and wellness. Therefore, home health care is seen as one of the most relevant wellness services due to high accessibility and low cost of diagnosis. The growth relevance given to the sleep related disorders, due to the high importance of sleep in our lives, is specifically significant in this context encouraging the development...
Scene flow is a key function of stereo-based environment perception system for mobile robotics and autonomous vehicle. Due to the heavy computing requirement and the limited computing resource, parallelized and embedded algorithms become quite important for the application of the mobile robotics. This paper develops a cross-platform embedded scene flow algorithm by using a coarse-grained software...
TIGER (Turin Integrated Gem Electronics for Readout) is a mixed-mode front-end ASIC developed to readout the new inner tracking detector of the BESIII experiment, carried out at BEPCII in Beijing. The detector is planned to be installed during the 2018 upgrade and features an innovative three-layer triple-CGEM (Cylindrical Gas Electron Multiplier) with analog readout. The ASIC comprises 64 channels,...
Real-time results obtained from an unsupervised feature extraction system using Restricted Boltzmann Machines (RBMs) implemented on FPGA are presented. The feature extraction application is demonstrated using the MNIST dataset, and the weights storing features are visualized in real-time. A digit classification is also performed based on the learning results. Our demonstration system performs 134...
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