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In this paper, through analysis of function and working theory of RISC CPU instruction decoder module, we design instruction decoder module of 32-bit CPU. The instruction decoder includes register file, write back data to register file, sign bit extend, relativity check, and it is simulated on QuartusII successfully.
This paper introduces architecture and feature of 32-bit micro-processor, and describes internal data path in processor. Through analysis of function and theory of RISC CPU instruction decoder module, we design instruction decoder (ID) module of 32-bit CPU by pipeline theory. The instruction decoder includes register file, write back data to register file, sign bit extend, relativity check, and it...
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