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This paper presents a half-bridge driver to fulfill the requirement for interfacing with MEMs sensors. The upper switch of the driver is implemented by a p-type power transistor to make the driver feasible for pulse density modulated input signal. The high-side “ground” reference voltage VSSH is regulated through the proposed charge pump circuit, which harvests the charges flowing into the VSSH node...
A charge pump circuit to minimize current mismatch and current variation over a wide voltage compliance range is proposed. A feedback loop is used to cancel both deterministic and random mismatches between charging and discharging current to minimize PLL reference spurs and static phase offset. A current compensation circuit is used to minimize current variation to avoid bandwidth variation and loop...
This paper proposed program voltage circuit techniques for 3D Solid State Drives (SSDs) with NAND flash memories. We reduced the charge pump stage using external high voltages of 12V and 5V with a proposed soft pre-charge high voltage switch to improve the power efficiency and area efficiency without a breakdown issue. The physical layout area in comparison with a conventional scheme and improves...
A novel interface circuit topology with power management is presented for ultra-low voltage DC-DC step-up conversion. The proposed 90 nm CMOS circuit avoids off-chip components or non-standards processes, and is suitable for ultra-low voltage system-on-chip applications. Comparative analysis was performed with a commercial low voltage DC-DC converter to identify the relative advantages and disadvantages...
This paper presents a charge pump based on voltage doublers, which can operate at very low input voltages. The proposed design uses dedicated boosting circuits and dynamic body biasing of the pass transistors. Driving capability, voltage gain, and conversion efficiency are demonstrated through simulations.
In this paper, a new design for efficiency enhance switching-capacitor DC-DC voltage converter based on combination of traditional charge-transfer-switch charge pump and cross-coupled output stage. In order to get a high output power and pump-efficiency. By using multi-phase technique, its can increase both of pump-efficiency and power-efficiency. The propose multi-phase mixed-structure charge pump...
In this paper, a regulated dual phase charge pump with switched-capacitor voltage reference is presented. This charge pump uses a dual phase technique to reduce the output ripple and combines the switch-capacitor CMOS voltage reference to diminish the chip area and quiescent current. This charge pump provides output voltage 5 V and maximum load current 5 mA with the constant frequency regulation....
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
Driven by the proliferation of implantable and self-powered electronic devices, low-voltage, low-power, high-efficiency DC-DC power converters are on high demands. This paper first reviews the state-of-the-arts charge pumps, with focus on power loss minimization, power stage architectures and control signaling. A new four-phase complimentary charge pump is then proposed. By employing the techniques...
In this paper, the regulated dual phase charge pump with compact size is presented. This charge pump uses the dual phase technique to reduce the output ripple and proposes a new power stage to define the stability of the overall system. This charge pump provides output voltage 5V and maximum load current 50 Am with the constant frequency regulation. This design is based on TSMC 035 mum 3.3V/5V CMOS...
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