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In this paper we present the split-phase synchronisation technique to reduce the pessimism in the WCET analysis of parallelised hard real-time (HRT) programs on embedded multi-core processors. We implemented the split-phase synchronisation technique in the memory controller of the HRT capable MERASA multi-core processor. The split-phase synchronisation technique allows reordering memory requests and...
Driven by the evolution of modern computer architectures from uni-processor to multi-core platforms, there is an increasing need to provide light-weight, efficient, and predictable support for fine-grained parallel and distributed execution of soft real-time tasks with end-to-end timing constraints, modeled as directed a cyclic graphs whose edges capture dependences among their subtasks. At the same...
This paper addresses the problem of scheduling periodic parallel tasks on a multi-resource platform, where tasks have real-time constraints. The goal is to exploit the inherent parallelism of a platform comprised of multiple heterogeneous resources. A resource model is proposed, which abstracts the key properties of any heterogeneous resource from a scheduling perspective. A new scheduling algorithm...
In this paper we present synchronisation techniques for hard real-time (HRT) capable execution of parallelised applications on embedded multi-core processors. We show how commonly used software synchronisation techniques can be implemented in a time analysable way based on the proposed hardware primitives. We choose to implement the hardware synchronisation primitives in the memory controller for...
We consider software transactional memory (STM) concurrency control in multicore embedded real-time software. We design an Earliest-Deadline-First (EDF) contention manager (CM) to augment STM's obstruction-free progress semantics. We establish the conditions under which STM/EDF-CM is competitive to lock-based and lock-free synchronization. Our experimental results reveal that STM/EDF-CM outperforms...
This paper presents SAPPHIRE — a novel middleware and software development kit, developed to reduce implementation efforts in utilizing task parallelism to speed up execution time of analysis of a stream of data, such as medical video. As a case study, we implemented a real-time quality measurement of colonoscopy using SAPPHIRE. We increased the number of threads in our case study from 4 (prior to...
Nowadays, data reliability and availability are big challenges that the designers of large data centers have to face. Remote mirroring technology is an effective approach for data protection. It maintains a complete copy of primary site at geographically distant locations. Data consistency is the key point of the replication process in the remote mirroring system. This paper improves the consistency...
To overcome the shortage of single-thread in communication efficiency, a new model called multithread serial communication which of Windows CE was built. First structured a serial class function, then created the threads and solved the problems that threads could not be synchronized. After being implemented the project of injection manipulator hand-held devices, executive equipments had been accelerated,...
Currently multicore systems start to be used even in low-end devices such as embedded systems controllers requiring real-time guarantees. Hardware Transactional Memory (TM) is a new synchronization paradigm for this architecture, allowing problems of lock-based methods and making easer programming. We propose to use TM to synchronize the concurrent/parallel execution of the Garbage Collector (GC)...
This paper focuses on applying a component-based technology to the integration of applications and services deployed in heterogeneous, distributed and open platforms. The proposed technology extends the Container/Component model, adding new services to the components to facilitate their integration in these platforms. The component can have an arbitrary structure and internal complexity, can be used...
Today's trend in real-time systems reveals the necessity of new technologies to easy their development and maintenance. Among others, some interesting alternatives are found in high-level real-time programming languages, better development models, or simple architectures and models. From the perspective of real-time Java, a recent real-time programming language, this paper offers an architecture (and...
Seamless HW/SW codesign flows support early verification of hardware and Hardware-dependent Software (HdS) like drivers, operating systems, and firmware. For early estimation and verification, the application of SystemC in combination with Instruction Set Simulators and Software Emulators like QEMU is widely accepted. In this article, we present an advanced design flow for HW, (RT)OS and HdS refinement...
This paper implements an embedded system current industrial communication protocol. It is based on the fastest EtherCAT, as fast as a PC-based system. The EtherCAT Slave module is easily used due to the Master System composed of the Embedded System.
Real time control applications are very demanding in terms of closed loop system response. The challenge is to execute an operation in a predictable amount of time. As more control functions are needed, faster computing speed is preferred to achieve the desired control responses. The major processor manufacturers have given up trying to make processors run faster, at least for the time being. Instead,...
Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) residing on one or several processors. For scaling of each task set and processor configuration, instruction set simulation and worst case timing analysis are typically applied. This paper presents a complementary approach for...
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