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Various domestic appliances use the Direct Current (DC) for its operation such as chargers, TV and DVD sets, laptops etc. However, the powers supplied in homes are Alternating Current (AC), 220/230V 50Hz. Several rectifiers have been developed over the time to convert this AC to DC (suitable for devices or appliances) and the better option among them is the diode bridge rectifier. In terms of power...
A low-voltage low-power CMOS bridge resistance-to-frequency converter (RFC) with high linearity for Internet of Things (IoT) applications is presented. It is based on a new single stage folded-cascode hybrid transconductor topology dedicated for RFC. The transconductor is a hybrid combination of a level-shift flipped voltage follower (LSFVF) and a folded shunt-feedback voltage follower (FSFVF) to...
Traditional test methods that use abstract fault models potentially results in low defect coverage and test escapes for ICs with multiple supply voltage (Vdd) settings for adaptive power management, and in the presence of process variation. In this paper, we address two important defect types, resistive bridge defects and full open defects, and present foundational work on variation-aware test methods...
Recent research has shown that tests generated without taking process variation into account may lead to loss of test quality. At present there is no efficient device-level modeling technique that models the effect of process variation on resistive bridges. This paper presents a fast and accurate technique to model the effect of process variation on resistive bridge defects. The proposed model is...
The use of multiple voltage settings for dynamic power management is an effective design technique. Recent research has shown that testing for resistive bridging faults in such designs requires more than one voltage setting for 100% fault coverage; however, switching between several supply voltage settings has a detrimental impact on the overall cost of test. This paper proposes an effective gate...
Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires more than one voltage setting for 100% defect coverage; however switching between several supply voltage settings has a detrimental impact on the overall cost of test. This paper proposes an effective Gate Sizing technique for reducing...
This paper investigates the impact of process variation on test quality with regard to resistive bridging faults. The input logic threshold voltage and gate drives strength parameters are analyzed regarding their process variation induced influence on test quality. The impact of process variation on test quality is studied in terms of test escapes and measured by a robustness metric. It is shown that...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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