The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, the wideband and dual-band architectures for digital predistorters (DPD) are compared in terms of the DPD models used, hardware implementations, complexity and linearization performance. The advantages and disadvantages of each architecture are outlined and hardware measurements are performed using an amplifier prototype to illustrate the differences between the two approaches.
A cost-effective and flexible FPGA-based system architecture for digital predistortion (DPD) based linearization of power amplifiers (PAs) is proposed. The system is used to show the effectiveness of the cross-memory polynomial model (CMPM) for DPD. Two commercial amplifiers are linearized using single and two-carrier Wideband Code Division Multiple Access (WCDMA) signals as excitation and the performance...
Hardware implementation of real-valued focused time-delay neural network (RVFTDNN) in FPGA for digital predistortion is presented in this paper. The predistorter implemented in field programmable gate array (FPGA) using RVFTDNN is obtained based on model inverse with indirect learning scheme and trained offline with Levenberg-Marquardt (LM) algorithm. Measurement results show that more than 10dB improvement...
This paper presents a new architecture for frequency-selective digital predistortion (DPD) for two-band PA linearization. The algorithm used accounts for differential memory effects up to 5th order for bands which can be arbitrarily spaced. The preliminary demonstration study is performed using 2-band multi-tone signals with various tone spacing and band separation. The test signal and the linearization...
One of the issues of power amplifier used in satellite communications is its nonlinearity. Digital predistortion is used in a linearizer to inverse this undesired effect to achieve higher efficiency to the amplifier. Xilinx provides a predistortion core to be implemented in FPGA devices. The core is used in a linearizer to test its functionality and performance. Simulation results indicate a gain...
This paper introduces a new, accurate, and complexity-reduced three-nonlinear-box model that is suitable for the behavioral modeling and digital predistortion (DPD) of power amplifiers (PAs) exhibiting memory effects. This model is composed of a look-up table (LUT), a memory polynomial (MP), and an envelope MP (EMP), which are all connected in parallel, and it is termed as Parallel-LUT-MP-EMP (PLUME)...
In this paper, FPGA implementation of augmented Hammerstein predistorters for linearizing wideband RF power amplifiers with memory effects is presented. The augmented Hammerstein nonlinear model based predistorter is briefly introduced. The implementation method of the augmented Hammerstein predistortion on FPGA is described in details. The experimental platform based on Agilent vector signal generators...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.