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Embedded temperature sensors based on proportional-to-the-absolute-temperature (PTAT) current sources have the potential to lay the foundation for low-cost temperature-aware integrated circuit architectures if they meet the requirements of miniaturization, fabrication process match, and precise estimation in a wide range of temperatures. This paper addresses an analytical approach to the minimum-element...
Bipolar junction transistors with a non isolated substrate have extra effects that need to be included in compact models. These effects are due to the existence of a parasitic pnp transistor inside the main transistor having the substrate as its collector. The parasitic can be modeled as a complete transistor, however that would add too much complexity to the whole model. This work focuses on one...
This paper presents a new methodology to characterize and simulate the electro-thermal aspects of packaged power drivers using lateral bipolars. Maximum elevation of junction temperature due to the electrical power stress is sensed in the field of the drivers. Those measurements are further complemented by the transient interferometric mapping (TIM) inspection. For the first time a data driven segmented...
This paper reports measurements and simulations made on 1200V 6A Silicon carbide (SiC) bipolar junction transistors. A SPICE model for the transistor has been developed and verified by static and dynamic measurements. Fast switching and low on state losses have been measured and SPICE simulated on the component level. To further describe the impact on a systems level a simplified boost converter has...
It is known that a second breakdown phenomenon similar to that observed in bipolar transistors can occur in power VDMOS, resulting from drain current snapback. A model for the drain current snapback phenomenon and its temperature dependence were investigated up to 300°C involving the avalanche multiplication of the channel current and the activation of the parasitic bipolar transistor. After presenting...
This paper presents thermal characterization of the dielectrically isolated bipolar junction transistor (DIBJT) with the vertical bipolar inter-company (VBIC) model. The VBIC model incorporates the thermal nodes of a transistor. Semiconductor devices are strongly influenced by the thermal effects. When the device is heated, it raises its local temperature which changes the device's intrinsic parameters...
It was found that the single event transient (SET) phenomenon in logic circuits strongly depends on doping concentrations. We think that two parasitic bipolar devices located under a MOS gate with low channel doping concentration suppress SET. Radiation induced electrons are transferred from a drain to a source. As a result, SET can be reduced without implementing any extra circuit area.
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