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Logic synthesis of reversible circuits has received considerable attention in the light of advances recently made in quantum computation. Implementation of a reversible circuit is envisaged by deploying several special types of quantum gates, such as k-CNOT. Although the classical stuck-at fault model is widely used for testing conventional CMOS circuits, new fault models, namely single missing-gate...
This paper presents a framework that utilizes Boolean difference theory to find test vectors for stuck-at-fault detection. The framework reads in structural-style Verilog models, and automatically injects single stuck-at-faults (either stuck-at-zero or stuck-at-one) into the models. The simulations are then performed to find minimal sets of test vectors. Using this setup, we conducted experiments...
Multi-detect (N-detect) testing suffers from the drawback that its test length grows linearly with N. We present a new method to generate compact test sets that provide high defect coverage. The proposed technique makes judicious use of a new pattern-quality metric based on the concept of output deviations. We select the most effective patterns from a large N-detect pattern repository, and guarantee...
This paper discusses in detail the development process of general interface adapter in the digital circuit fault diagnosis system based on VXI. After introducing VXI bus, the paper gives overall description of fault diagnosis system, presents a method of solving the problem about load matching and interface matching, and realizes the function of identification to read and write on the memory of interface...
This paper presents a combinational test generation method for transition faults in acyclic sequential circuits. In this method, to generate test sequences for transition faults in a given acyclic sequential circuit is performed on its extend time-expansion model. The model is composed of two copies of time-expansion model of the given circuit and extends in the close two sequences to generate 2 vectors...
Quantum cellular automata (QCA) circuits, the new generation nanotechnology with wide attention in recent years. In this we are proposing a framework based on QCA for finding out the stuck-at fault of a circuit. The existing technologies and methods are not guaranteed to detect the stuck-at faults. This work is motivated by the fact that the stuck-at fault test set of a circuit is not guaranteed to...
The diverse nature of the faults and defects that may occur at nanoscale ranges necessitates new techniques for ATPG. This article proposes an efficient technique that relies on a probabilistic approach to detect and diagnose nontraditional faults and defects.
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