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Recently, 60 GHz receiver front-ends have emerged, aiming for very high-data-rate communication. From a cost perspective, a highly integrated solution is favorable. Speed and power consumption considerations for the high-data-rate digital part of the chip make 45 nm CMOS a very realistic candidate technology for such systems. This work presents a 150times50 mum2 60 GHz low 1/f noise direct-downconversion...
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