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This research proposes a new 6T1M memory structure, which is designed using 6 transistors and a single memristor. The proposed cell is capable of storing data in bidirectional fashion. This memory model is not only space efficient but also operates faster than other conventional structures. It does not require any refresh operation as it prevents state drift during successive read operation. Extensive...
A full logic compatible 4T2R nonvolatile Static Random Access Memory (nv-SRAM) is successfully demonstrated in pure 40nm CMOS logic process. This non-volatile SRAM consists of two STI RRAMs embedded inside the 4T SRAM with minimal area penalty and full logic compatibility. Data is accessed through SRAM cells, and stored by switching one of the loading RRAMs by an unique self-inhibit feature. With...
This paper presents a MTJ Based non-volatile SRAM in 45 nm technology. It combines fast and low power partners with time-division satisfaction of high performance and low leakage energy requirements. It can store and restore the data in memory cells, inputs, outputs, clock, and address signals. Simulations show that the maximum frequency can reach 4.5 GHz. When the sleep time is more than 105 seconds,...
In modern system-on-chips (SOCs), static power consumption represents a significant portion of the chip power. Since static random access memory (SRAM) typically occupies more than one half of the chip area, static power of a SOC is mainly constituted by the SRAMs. Resistive nonvolatile-8T (Rnv8T) SRAM has been proposed to alleviate static power and preserve data in power-down mode and provide fast...
We discuss non-volatile SRAM cells capable of storing multiple bits and their applications as multi-context configuration memory. The cells are based on the standard 6T SRAM with multiple pairs of programmable resistors such as magnetic tunnel junction or resistive memory elements. In one of the cell designs the active state of the SRAM can be switched in one clock cycle by the use of an additional...
A novel hybrid memory architecture - Non-Volatile SRAMs (NVSRAMs) wherein resistive memories incorporated as an integral part of SRAM cell to provide information back-up feature is presented in this paper. It also makes a discussion on some of the challenges faced in implementing hybrid memories and the prospective solutions.
In this paper, a new approach toward the design of a memristor based nonvolatile static random-access memory (SRAM) cell using a combination of memristor and metal-oxide semiconductor devices is proposed. Memristor and MOSFETs of the Taiwan Semiconductor Manufacturing Company's 180-nm technology are used to form a single cell. The predicted area of this cell is significantly less and the average read–write...
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