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Process variations have increased significantly with scaling technologies. This has led to deviations in analog circuit performance from their expected values. Macromodeling of analog circuits is emerging to be an essential paradigm of CAD, leading to significant benefits for simulation, design space exploration, inter process migration, test development etc. In this work, we develop a CAD tool for...
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a SPICE-type circuit simulation problem as a satisfiability problem. We start with a circuit level netlist, capture the non-linear behavior of the circuits at the transistor level via conservative approximations and transform...
Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been proposed as a critical figure of merit of RTPG. Our research introduces the definition of average EBT in a run-time environment. We develop a method to estimate the average EBT for any given circuit block, considering the...
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