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This paper presents a method to match the clock frequency in multi-rate systems by extracting the SYNC clock. This method is applicable to all multi-rate hierarchical master-slave systems and synchronous digital hierarchy (SDH) networks in which master and slave are designed to work at different clock frequencies. Using the presented method, any system can be added to the network whose clock frequency...
The subject area of this paper is discrete-time linear time-invariant systems composed of subsystems whose state updating is asynchronous due to the clock signal arriving with delays. This leads to the synchronization error identification problem which is to find from a trajectory of the system the order in which the subsystems' states are updated. A solution to this problem based on a direct search...
There are many latent dangers in digital library (DL) information system. To protect the information resources and the continuity of information service effectively, it is necessary to construct digital library remote disaster recovery system (RDRS). Firstly, this paper discusses the role of disaster recovery in digital library information security system, the classification & technique parameters...
A method based on adaptive sliding mode variable structure controller is presented for synchronization of a class of chaotic system with perturbations and parameter mismatch. The controller is more robust to perturbations, parameter mismatch and inputs sector nonlinearity. Moreover, no restrictive assumption is imposed on the system. Thus the adaptation range of the proposed method becomes broad....
Thinking of multiple frequency channels in wireless ad hoc networks can significantly improve the throughput if advanced MAC protocols are employed. The efficiency of multichannel protocols mainly depends on the channel assignment strategy, which has to assure both fairness and low signaling overhead. Taking into account these needs, the present work proposes a new multichannel MAC protocol, based...
This paper presents an asynchronous and a synchronous NoC router architecture. The asynchronous scheme is implemented by the help of CSP-Verilog language and the synchronous one is designed employing VHDL language. Their designs are similar except the extra links which are in charge of handshaking processes in asynchronous architecture. According to the experimental results the transition counts of...
A revision of IEEE Std 1641 is coming to an end and is undergoing its approval cycle. This standard, which provides a method of accurately defining signals and tests, has been further developed with many improvements. The use of signals and events has now been extended to include digital signals. These three elements, physical signal streams, event streams and digital streams, provide the vital backbone...
In this paper, we focus on the problem of implementing a periodic concurrent system with timing constraints into multi-context dynamically reconfigurable processors (DRP). A concurrent system has multiple tasks that can be executed in parallel. Moreover, some tasks in a specific set of processes might be required to synchronize each other. We propose a method for assigning tasks into a multi-context...
This paper presents architecture for accelerating message switch and synchronization performed in a message passing library developed on Maestro3 cluster network. Maestro3 is a high-performance cluster network that has the optimized data link layer and the capability of dynamic offload. We propose the dedicated hardware for further improvement of communication performance. In this paper, detailed...
The performance of video signal is important to the quality of DVD Recorders. A carefully-designed moving image is an effective signal for testing and measuring the video output of DVD recorders. But this kind of moving image is impossible to generate and analyze for traditional instruments. Virtual instrument technology sheds a new light to tackle this problem. This paper firstly presents a moving...
The green energy transfer with isolation is used to transfer the energy which can not be used directly to the energy which can be utilized directly. This is achieved via switching control, i.e. duty-cycle control. However, by this way, the low-duty cycle is likely to deteriorate the utilization effectiveness of semiconductor devices and magnetic components. Consequently, to conquer this problem, a...
This paper addresses the problem of synchronization errors in distributed dynamical systems. In particular, it focuses on the question of stability for the case where all subsystems have the same sampling frequency, but different switching times. In contrast to previous work, the approach taken here models the set of system matrices that arise using a polytopic uncertainty approach, where a polytope...
The paper presents results of investigation of dual-inverter-based power conversion system with synchronized pulsewidth modulation (PWM) for photovoltaic application. This system topology includes two isolated strings of photovoltaic panels, feeding two standard three-phase inverters, connected to grid by a three-phase transformer with the open winding configuration on primary side. Algorithms of...
Key technologies of disaster tolerant intelligent network are briefly introduced at first. After the hot-standby disaster tolerant IN architecture is analyzed, a load-sharing mode is proposed which has no downtime during switchover. By constructing the availability models of local clustered subsystem and the load-sharing disaster tolerant IN system based on birth-death process, it is proved that the...
In Frequency Division Duplex (FDD) systems or Time Division Duplex (TDD) systems with perfect Uplink (UL)/Downlink (DL) alignment, all UL transmissions receive interference only from other UL links and vice versa. However, take into consideration one of the most important benefits that TDD offers, i.e., dynamic UL/DL switching points, the UL and DL transmission can be misaligned. This means UL might...
Software development tools have not adapted to the growing popularity of multi-core CPUs, and developers are still "stuck"' with low-level and high-cost thread abstractions. The situation is becoming even more complicated with the advent of heterogenuous computing. In this article, we point out some drawbacks of high-level abstractions currently in use, and propose Kahn process networks...
SystemC is a discrete event simulator that enables the programmer to model complex designs with varying levels of abstraction. In order to improve precision, it can be coupled to more specialized simulators. This article introduces the concept of loose simulator coupling between an analogue simulator and SystemC. It explains the properties and advantages which include a higher simulation performance...
This work introduces a new modulator for multi-phase interleaved converters, capable of tolerating abrupt changes both in the differential input-output voltage and the reference; while it reduces the interleaved adjustment time and the error during the transient. The proposed method can be applicable to high power systems.
Multitasking of concurrent processes implements the concurrency inherited from applications, increasing the utilization of limited resources. It requires an operating system and imposes significant runtime overhead. Serializing multitasking codes removes the need of operating system and the overhead as well. In this paper, we propose a software synthesis method to transform multitasking codes into...
Several papers have addressed the problem of knowing which software test criteria are better than others with respect to parameters such as cost, efficiency and strength. This paper presents an empirical evaluation in terms of cost and efficiency for one test method for finite state machines, switch cover, and two test criteria of the statechart coverage criteria family, all-transitions and all-simple-paths,...
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