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The Fast Control and Timing distribution System (FCTS) of a High Energy Physics experiment must distribute the clock with minimum jitter and it must transfer data with a fixed latency. In fact, transferred data include trigger signals (accept/reject and qualifiers) and fast control commands, whose timing must be preserved. Latest Field Programmable Gate Arrays (FPGAs) offer embedded high-speed Serializers-Deserializers...
EAST Distributed Synchronization and Timing System (DSTS) provides trigger and clock signals for control and measurement. Base on the embedded technology and the field programmable gate arrays (FPGA), a DSTS is designed in distributed structure, which is composed of one Core Module Unit (CMU), some Local Synchronized Node Units (LSNU), some auxiliary hardware interface, an optical network and a managing...
Fast verification of the prototype design on software radio platform has become one of the most important research topics in communication systems. Based on OFDM receiver which is implemented on FPGA, the paper focuses on many key issues in the implementation of the strategy in software wireless platform such as OFDM frame synchronization, frequency compensation, symbol timing, etc. The proposed corresponding...
This paper presents the features, architecture, application design flow and evaluation of the OReK real-time micro kernel, for integration on FPGA-based SoCs for applications running on embedded softcore or hardwired processors. The features of the OReK kernel include the combined support for heterogeneous task sets, predictable shared resources synchronization, task-based interrupt servicing and...
Single-carrier (SC) transmission using frequency domain equalization (FDE) is one of the candidates for the next generation mobile communication systems expected to deliver high-speed and high-quality packet data services. Fast synchronization is critical for the performance of packet transmission systems. In this paper, a robust timing synchronization scheme for SC-FDE packet transmission is presented...
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
The design of timing recovery in DVB-S2 demodulator is a challenging issue, especially with the modulation scheme of high order amplitude and phase shift keying (APSK) and the very low signal to noise ratio (SNR) near Shannon limits. This paper presents an FPGA implementation scheme which meets the requirements of DVB-S2 system. Based on some comparison and analysis, Gardner algorithm is adopted as...
This paper proposes a novel preamble structure and a timing synchronization method for OFDM systems. The preamble structure has both properties of delayed and symmetric correlations which can afford accurate time and frequency synchronization simultaneously. A new timing metric is also proposed according to the preamble structure, which is the production of the modulus of delayed and symmetric correlation...
The DIII-D Tokamak relies on a facility wide timing network to synchronize machine operations. The first generation system was designed around cascaded CAMAC delay units feeding a custom timing network encoder. This system has become increasingly difficult to maintain and repair and the needs of DIII-D experiments are beginning to exceed its capabilities. To address these issues, a new second-generation...
A new Timing and Synchronization System component, the Universal Networked Timer (UNT), is under development at the National Spherical Torus Experiment (NSTX). The UNT is a second generation multifunction timing device that emulates the timing functionality and electrical interfaces originally provided by various CAMAC modules. The UNT features Field Programmable Gate Array (FPGA) technology which...
Orthogonal frequency division multiplexing (OFDM) is an effective modulation technique for high-rate transmission over frequency selective fading channels. However, just because of its orthogonality, OFDM systems are also extremely sensitive and vulnerable to synchronization errors. In this paper, we investigate a scheme especially for symbol synchronization utilizing the special training structure,...
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