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A Ka-band power amplifier (PA) in a differential cascode topology with active biasing is designed, implemented in a 0.25 μm SiGe BiCMOS technology, and characterized. The design presents low power consumption and high Power Added Efficiency (PAE). This PA presents an output power of 12.3 dBm at P1dB with 16.5% Power Added Efficiency (PAE). The PAE peak is 17.5 % and it is centered nearby the P1dB...
In this paper, a 60 GHz power amplifier is presented in 65nm CMOS technology based on the transformerless load-modulated (TLLM) amplifier architecture. It is designed to obtain high efficiency at output power back-off. The amplifier has 12.5 dB small signal gain and 11.5 dBm saturated output power. Measurement results show that this amplifier has more than 8% drain efficiency (7% power-added efficiency)...
A mode-transferring technique for designing high-frequency high-efficiency broadband power amplifiers is presented in this paper. It is demonstrated, for the first time, that by properly tuning the second and third harmonic impedances, a PA can operate between inverse Class-F and Class-F modes within a 1.5 ∶ 1 bandwidth. A broadband PA is designed by employing this technique with a commercial GaN...
We have demonstrated 8.5–11.5 GHz class-E MMIC high-power amplifiers (HPAs) with a peak power-added-efficiency (PAE) of 61% and drain efficiency (DE) of 70% with an output power of 3.7 W in a continuous-mode operation. At 5 W output power, PAE and DE of 58% and 67% are measured, respectively, which implies MMIC power density of 5 W/mm at Vds = 30 V. The peak gain is 11 dB, with an associated gain...
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