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A novel wideband 1-π equivalent circuit model for on-chip spiral inductors is presented. A substrate network, consisting of R/L/C, is proposed to model the broadband loss mechanisms in the silicon substrate. The skin and distributed effects for windings have been taken into account. A series of inductors with different geometries are fabricated in standard 0.18-μm 1P6M RF CMOS process to verify the...
A novel inductor model, which considers the magnetic and capacitive substrate coupling comprehensively, and a new fast approach for substrate network parameter extraction are presented in this paper. The introduction of substrate parasitic inductance (SPI) and the mutual inductance is based on the resonance characteristic of the measured substrate's Y-parameter and their physical meaning. A series...
This paper presents the scalable modeling of spiral inductors for RFIC design based on 0.13 mum RF CMOS process. Usually, scalable modeling requires so many patterns with variations in their width, number of turns and inner radius. To save the area of test patterns and time for modeling, this work utilizes the width-scaling approach. At first, inductor patterns with a single width are fully fabricated...
This paper reports a new advanced design of the active circuit named boot-strapped inductor (BSI), which realizes an equivalent inductor with an high quality factor (Q). In particular, a new small-signal circuit model is proposed for an accurate design at high frequency in a modern RF CMOS process, also by taking into account the issues of an algorithmic and low-power consumption circuit design. A...
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