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This paper describes an op-amp with a novel Class-AB Push-Pull output stage employing a “constant-transconductance” cell for keeping the amplifier gain-bandwidth product constant over different load conditions. A biasing scheme is also examined to define the quiescent current of the op-amp. The circuit is part of the current sensing scheme for a DC-DC Buck converter. The proposed system has been built...
This paper presents a DC-RF power inverter that efficiently synthesizes high-voltage RF waveforms directly from a battery voltage using thin-oxide CMOS switches. Instead of stacking transistors or employing large inductive transformation ratios, high output power is generated by switching individual class-D power amplifier (PA) cells in a 2-phase house-of-cards (HoC) topology to provide voltage addition...
This paper presents the adaptive analog hardware implementation of a MLP (multilayer perceptron architecture) ANN (artificial neural networks) for online nonlinear system operation. Neurons are implemented by bipolar differential pairs with tangent hyperbolic activation function. A bipolar current multiplier and a linearized differential amplifier are proposed for storing and adjusting the weights...
Speed and the overall performance of any digital signal processor are largely determined by the efficiency of the multiplier units present within. The use of Vedic mathematics has resulted in significant improvement in the performance of multiplier architectures used for high speed computing. This paper proposes 4-bit and 8-bit multiplier architectures based on Urdhva Tiryakbhyam sutra. These low...
For the operation of a successive approximation register analog-to-digital converter, an integrated reference voltage source is required. This reference has to be stable and has to have high precision. Therefore, trim mechanisms for the achievement of optimal accuracy and minimum temperature drift behavior are necessary.
We present a compact Gm-C biquadratic cell with fully differential input/single-ended output for continuous time low pass filtering and channel bandwidth selection in integrated sensor interfaces. Transconductors with input MOSFETs operating in triode region allow the filter to operate at very low cut-off frequencies without excessive area occupation. The noise versus input range issue is originally...
The downsizing of transistor dimensions enabled in the future nanotechnologies will inevitably increase the number of faults in the complex ULSI chips. To maintain the production yield at acceptable level, several levels of protection mechanisms will have to be implemented to tolerate the permanent and transient faults occurring in the physical layers. In this paper, we study fault tolerance at the...
In this paper, we present a new technique to improve the reliability of H-tree SRAM memories. This technique deals with the SRAM power-bus monitoring by using built-in current sensor (BICS) circuits that detect abnormal current dissipation in the memory power-bus. This abnormal current is the result of a single-event upset (SEU) in the memory and it is generated during the inversion of the state of...
This paper compares readout powers and operating frequencies among dual-port SRAMs: an 8T SRAM, 10T single-end SRAM, and 10T differential SRAM. The conventional 8T SRAM has the least transistor count, and is the most area efficient. However, the readout power becomes large and the cycle time increases due to peripheral circuits. The 10T single-end SRAM is our proposed SRAM, in which a dedicated inverter...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
As semiconductor technology moves closer to the ultimate physical limits for scaling of devices that utilize electrons as information bearing particles, many new opportunities for research in the physical sciences are emerging. If we look beyond the limits of scaling electron devices, many more challenging research opportunities exist in the areas of physics of information carriers and physics of...
The next generation of wireless communication is a ubiquitous radio system concept, providing wireless access from short-range to wide-area, with one single reconfigurable and adaptive system for all envisaged radio environments. This paper presents the design approach of RCO (reconfigurable concurrent oscillator) that simultaneously generates two or more signals of different frequencies that eliminate...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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