The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Wireless-powered chips are used in a wide range of applications, including biomedical implants. However, the resonant frequency of the power receiving circuit can be affected not only by process variations, but also by the changing environment. In order to optimize the power transfer and allow the chip to work despite these variations, a fully integrated tuning system is proposed. After having assessed...
An amplitude demodulation system is described here. An envelope detector is connected to the non inverting input of a differential amplifier whereas a reference voltage is applied to its inverting input. This reference is established during a self calibration process and compensates the input offset of the differential amplifier. This mechanism has been designed and implemented within the circuit...
A method of resistance calibration without external precision elements usage presented in paper. In the proposed method, used structures which operation based on technologically accurate elements and signals to have high accuracy resistance after calibration. Architecture produces a calibration code corresponding to 50Ohms PVT compensated termination impedance, which is needed to avoid reflections...
A 64-way time-interleaved successive approximation based ADC front-end efficiently incorporates a 2-tap embedded FFE and a 1-tap embedded DFE, while achieving 4.56-bits peak ENOB at a 10GS/s sampling rate. Fabricated in 1.1V 65nm CMOS, the ADC with embedded equalization achieves 0.48 pJ/conv.-step FOM, while consuming 79.1mW and occupying 0.33mm2 core ADC area.
A 4th order Chebyshev complex filter with stop band zeros at the DC point for low-IF receivers' applications using 0.18μm CMOS technology is proposed in this paper. Based on capacitor-OTA integrators, the designed ladder filter uses resistors instead of capacitors to realize the transmission zeros. The complex filter has a 0 to 48dB tunable gain (6dB per step) and over 65dB DC-offset rejection. A...
A 6th order Chebyshev type I low pass filter applied in zero-IF wireless receivers, implemented in 0.18 ??m CMOS technology is introduced, this filter is realized with leapfrog structure, has an attenuation of 30 dB at 5.25 MHz, less than 1 dB in-band ripple, 25 nV/sqrt(Hz) input referred noise at 5 kHz, and draws 2.6 mA from 1.8 V supply. By employing frequency calibration circuit, the cut-off frequency...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.