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Reliability study of high-κ (HK) gate dielectric based transistors has become imperative for the current and future CMOS technology nodes as the industry shifts towards replacement of conventional silicon oxynitride (SiON) with hafnium-based oxides. One of the key requirements of any oxide reliability study is a quantitative assessment of the time dependent dielectric breakdown (TDDB) lifetime using...
Time Dependent Dielectric Breakdown (TDDB) in p-FETs with HfSiON/SiO2 gate stacks under negative bias stress has been studied. It is shown that the shape parameter of Weibull distribution of Tbd, β, is very small value independent of gate electrode materials. This small β seems to arise from the interface layer (I.L.) breakdown. Further experimental result reveals the existence of additional interface...
The key methods used to convert ramped voltage test (RVT) data to long term reliability measurement data are reviewed. During the last years the discussion to replace time consuming constant voltage stress (CVS) tests with ramp testing was pushed forward, mainly due to time constraints during qualification of high-k and also low-k material as well as through results obtained for ultrathin oxides [1]...
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