The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Wide band gap power semiconductor devices are now replacing the Si-MOSFET or IGBT. GaN-HEMT achieves the reduction in size and weight, thanks to its high frequency switching behavior. However, its high-speed switching characteristics and low threshold voltage may cause a false turn-on phenomenon, which is a fatal effect for the applications. It is urgent issue to tackle and avoid this problem by modifying...
As power electronic engineers increase the switching speed of voltage source converters for the purpose of higher power density, the dI/dt and dV/dt across the power semiconductors increases as well. A well-known adverse consequence of high dV/dt is parasitic turn-on of the power device in the same phase leg as the device being triggered. This causes a short circuit with high shoot-through current,...
Parasitic turn-on can cause unintentional triggering of the IGBTs since the discharge current of the Miller capacitance coupled with high dV/dt can activate a device that should be off. The short circuit current resulting from parasitic turn-on coupled with the high voltage causes significant power dissipation which can be a reliability issue. This issue is exacerbated by higher ambient temperatures...
It is well known that that source inductance could significantly increase turn-on and turn-off time, and therefore increase switching power loss. Also, it is well understood that switching loop inductance could reduce voltage stress during turn-on and increase voltage stress during turn-off. In this paper, a new inductive switching loss model that includes source inductance and switching loop inductance...
Nowadays, manufacturers of power management integrated circuits (PMICs) are producing devices that integrate many of the functional blocks required in power supplies in single tiny chips. This paper highlights the circuit design considerations as a part of highly integrated, high switching frequency (few MHz range) PMICs optimized to be fabricated using CMOS fabrication technologies. Moreover, the...
This paper proposes a new approach to analyze crosstalk of coupled interconnects in the presence of process variations. The suggested method translates correlated process variations into orthogonal random variables by principle component analysis (PCA). combined with polynomial chaos expression (PCE), the technique utilizes Stochastic Collocation Method (SCM) to analyze the system response of coupled...
A novel methodology for accurate and efficient static timing analysis is presented in this paper. The methodology is based on finding a frequency domain model for the gates which allows uniform treatment of the gates and interconnects. It is shown that despite the highly nonlinear overall gate model, a frequency domain model of the gate with the model parameters, gate moments, as functions of the...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.