The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Advanced Driver Assistance Systems (ADAS) enhance the ability of a vehicle driver to avoid possible road accidents resulting in a safer driving experience. Front camera ADAS is probably the most challenging of all. These systems require high computational processing, in the range of hundreds of GOPS, within a 4 Watt power budget driven by thermal constraints of small enclosed assembly of the final...
Increasing demand of multiple functions in a single device or with smaller area leads to more market for devices with System on Chip (SOC). An SOC have multiple Intellectual Properties (IPs) such as Processors, memory, peripherals etcetera on a single chip. These IPs need to have an efficient bus architecture for the communication purpose which further decides the device performance. The most used...
SoC (System on Chip) is the integration of heterogeneous components and each component can act as a bus master. Simultaneous requests from bus masters, for shared bus, pose a great challenge for on chip communication. Arbiter ease this challenge by deciding who to grant the bus for communication when simultaneous requests are made by bus masters. One of the technique that arbiter follows is the lottery...
In this paper, we introduce a course centered around MIPSfpga, an unobfuscated commercial MIPS soft-core processor made available by Imagination Technologies for academic purposes. The course focuses on hands-on learning that emphasizes System on Chip (SoC) design and hardware-software codesign. Students first study MIPS computer architecture and microarchitecture and then learn and experiment with...
In this paper, we present the implementation of a multi-mode crypto-coprocessor, which can support three different public-key cryptography (PKC) engines (NTRU, TTS, Pairing) used in post-quantum and identity-based cryptosystems. The PKC-based security protocols are more energy-efficient because they usually require less communication overhead than symmetric-key-based counterparts. In this work, we...
The increase growth of VLSI technology and consumer demand has enabled future System-on-Chip (SoC) systems to integrate up to several hundreds of cores within a single chip. Due to such enormous integration density and complexity of the system-on-Chip (SoC), the conventional architectures are not suitable to fulfill the demand and scalability issues. The application of traditional network technologies...
Currently large touch screen panels (TSP) tend to use projected capacitance technology, which allow multi touch and high sensitivity. For large TSPs with a large number of TX (driving) and RX (sensing) lines, however, it is increasingly challenging to achieve high sensitivity, high detection rate, and multi-touch. In this Paper, we propose a distributed architecture of touch screen controller where...
This paper proposed a reconfigurable and flexible SoC architecture for various applications of wireless sensor network (WSN). The hardware-software system reconfiguration can be easy done because the systems utilize FPGA based SoC as a platform. The system also supports various network topologies and interfaces. The supported interface consists of I2C, SPI, USART, etc. The main processing system of...
In this paper, one of AMBA (Advanced Microcontroller Bus Architecture) known as AMBA APB (Advanced Peripheral Bus) is designed which provides minimum power consumption and low bandwidth. For this, an APB Bridge with Reset Controller design has been implemented in Verilog language. Reset controller introduces a reset signal BnRES during Power-on Reset (POReset) conditions so that propagation of metastable...
Service selection is an important concept in service oriented architectures that enables the dynamic binding of services based on functional and non-functional requirements. The introduction of the concept of on-demand provisioned services significantly changes the nature of services and as a consequence the traditional service selection process does not fit anymore. Existing approaches for service...
The 32 bit AMBA ASB APB Bridge provides an interface between the Advanced System Bus (ASB) and the Advanced Peripheral Bus (APB). It inserts wait states for burst of read or write transfers when the ASB must wait for the APB. The bridge is designed to respond to transaction requests from the currently enabled ASB master. The ASB transactions are converted into APB transactions. APB peripherals do...
Today, solid state drives (SSDs) which is as a memory class storage device are widely used due to their superior performance over hard disk drivers (HDDs). This trend brings a new challenge to the design of storage adapters which are used to connect a host computer system to peripheral storage I/O devices. In this paper, we propose a joint hardware and firmware architecture and present a System-on-Chip...
SRAM, DRAM and FLASH are the three main employed technologies in design of on-chip processor memories. However, manufacturing constraints for this technologies in the most advanced nodes compromises further evolution. MRAM (Magnetic memory) presents itself as an attractive alternative for these technologies, as it has reasonable timing and power characteristics. Last results in the state of the art...
Multi-core system is becoming the next generation embedded design platform. Heterogeneous and homogeneous processor cores integrated in Multiple Instruction Multiple Data (MIMD) System-on-a-Chip (SoC) to provide complex services, e.g. smart phones, is coming up in the horizon. However, distributed programming is a difficult problem in such systems. Today, only in very few MIMD SoC designs we can find...
Soc is a technology that integrates heterogeneous system components such as microprocessors, memory logic and DSP's into a single chip. The overall performance of SoC design depends on efficient on-chip communication architectures. Efficient interconnection architecture is necessary interprocessor communication, communication between processors and peripherals and between processor and memory. The...
A system on a chip (SoC) is becoming smaller and denser. Shrinking transistor size facilitates the integration of functionality on the chip operating at low supply voltage, although this trend lowers the silicon chip reliability. Nevertheless, it is necessary to maintain complete functionality during a long duration, even under changing environments such as temperature fluctuation and/or device wearout:...
The following topics are dealt with: digital content; digital life; e-learning; Web service; HCI; information security; mobile computing; wireless communication; vehicular technology; image processing; computer graphics; multimedia technologies; computer architecture; SoC; embedded systems; artificial intelligence; knowledge discovery; fuzzy systems; computer networks; Web technologies; biomedical...
Distributed embedded systems are exposed to variable applications and requirements. This results in a dynamic and unpredictable changes in the availability of resources. Existing operating system implementations for embedded devices are struggling to address the challenges of efficiently utilizing modern target platforms with heterogeneous computational elements and variable resources. To cope with...
Increasing on-chip temperature in SoC designs has reinforced the need for Dynamic Thermal Management (DTM). The conventional DTM techniques adopted in microprocessors based on DVFS are not suitable in the context of SoCs as they tend to have multiple voltage and frequency domains. In this paper we propose a reactive and a predictive DTM technique using bus arbitration. Based on the thermal profile...
This paper describes a System-on-Chip platform architecture for low power high performance Digital Signal Processing intensive applications. The platform is based on the AMBA SoC bus protocol and incorporates a novel interfacing scheme which utilizes the bus hierarchy within AMBA in order to allow single and multiple high performance DSP Intellectual Property cores to be integrated to the SoC platform...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.