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Optimized balancing strategies are required to manage in the long-term the imbalances in batteries with cells strings. They are usually based on voltage monitoring and/or instantaneous estimates of the cells states of charge and aim to equalize the states of the cells at the end of a charge. The present paper proposes to take benefit from estimates of the cells capacity disparities to optimize these...
In the online job recruitment domain, accurate classification of jobs and resumes to occupation categories is important for matching job seekers with relevant jobs. An example of such a job title classification system is an automatic text document classification system that utilizes machine learning. Machine learning-based document classification techniques for images, text and related entities have...
Power consumption in programmable devices has become a primary factor in design flow. Among the main concerns of power consumption, application performance, battery life, thermal challenges, or reliability, power consumption is crucial in FPGA designs for powered battery equipment. In this paper, we study the FPGA-based design for Sobel Edge Detection algorithm for low cost fall detector and we present...
System-on-Chip architectures have traditionally relied upon bus-based interconnect for their communication needs. The increasing bus frequencies and load on the bus calls for focus on reliability issues in such bus-based systems. As technology advances and transistor geometry shrinks, both single-bit and multi-bit error rate increase significantly. The scant research on mulit-bit errors calls for...
Multi-core and many-core Systems-on-Chip (SoC) are growing more complex than ever. Consequently, developing system models for such SoCs to guide and validate architectural and implementation decisions is becoming a daunting task. It consumes a huge amount of time and effort just to get the model up and running. Although these system models can be fairly abstracted, they still require the setup of...
In this study, we introduce a far field-aware system on a chip (SOC) design for sound source location, which is implemented with 0.18-μm CMOS process. The adopted method for the proposed system is based on average magnitude difference function (AMDF). In order to effectively detect the acoustical source in actual environment, we integrate this system with voice active detection (VAD), which can actively...
With the increase in the design complexity of MPSoC architectures, estimating power consumption is very complex and time consuming at lower level of abstraction. We propose a methodology using ArchC named Power-ArchC for a fast high-level estimation of processor power consumption. Power values are obtained by an instruction level power characterization at gate level. The requirements for power evaluation...
Evaluating the system in early design steps is critical for an efficient design of Multi-Processor SoCs (MPSoC). When the number of processors grows, the simulation time tends to increase exponentially. Native co-simulation has been proposed to obtain performance estimations with sufficient accuracy while requiring short simulation times. In MPSoC architectures buses often become the most important...
Virtual platform models are a popular approach for virtual prototyping of multi-processor/multi-core systems-on-chip (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled...
The increasing complexity of today's system-on-a-chip (SoC) design is challenging the design engineers to evaluate the system performance and explore the design space. Electronic system-level (ESL) design methodology is of great help for attacking the challenges in recent years. In this paper, we present a system-level architecture refinement flow and implement a dual DSP cores virtual system based-on...
The need for computing power drastically increases and one solution is to use MPSoC. These MPSoCs become complex with the increase of the number of cores. Thus, designers use simulators to explore the whole platform parameters in order to define the best architecture. These simulators must be fast and accurate whatever is the architecture complexity. This paper introduces a new approximate-timed TLM...
The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to the increasing number of embedded components and the resulting complex interactions. In this paper, we present a modular trace-based simulation framework, targeting the performance analysis of stream-oriented applications on...
This paper presents an abstract service based modelling method for use in performance estimation and design space exploration of multi processor system on chip (MPSoC) based systems. The method provides the infrastructure for composing abstract hardware and software models of stream based systems which can be used to produce detailed quantitative information regarding runtime properties of a given...
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