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Efficient and smart techniques for analog data acquisition and processing may play crucial role in the design of miniature wearable devices, meant to continuously record, process and wirelessly transmit vital physiological parameters for real time health monitoring. In this work we propose a low-power, all-analog processing unit for an MPG (magneto-plethysmograph) based wearable device, which is meant...
The present paper introduces a novel ADC for biomedical sensors that embeds successive-approximation-register ADC and stochastic flash ADC operations. The ADC in the analog-front-end IC fabricated in a 130-nm CMOS process demonstrated 87 dB SNDR for a 20.5 Hz input signal at an oversampling rate of 250 kS/s with calibration by a supervised machine learning technique.
This paper presents a low noise resistive analog front-end (AFE) with automatic offset calibration loop. The capacitive transimpedance amplifier (CTIA) with correlated double sampling (CDS) technique is adopted to achieve low noise characteristics. The AFE employs automatic offset calibration loop (AOCL) to reduce the offset variations due to the fabrication imperfections. The automatic offset calibration...
One of the major challenge in neural prosthetic device design is to ensure charge-balanced stimulation. This paper presents a new calibration technique to minimize the mismatch between anodic and cathodic current amplitudes. The proposed circuit mainly consists of a digital and an analog calibration, where a successive approximation register (SAR) logic and a comparator are used in digital calibration...
An architecture of a programmable gain integrating amplifier is presented. The circuit operates using two clock phases for sampling and amplification and the gain is defined by the ratio between the pulse-width of a control signal and the integrator time constant, which is defined by a resistor and capacitor. The proposed architecture also has configuration switches that enable its use in the modes...
At SCL, an automated system is developed to calibrate DC current sources and meters, including electrometers and femto-ammeters, from 100 pico-amperes (pA) down to 100 femto-amperes (fA). The system comprises an in-house developed control software, a ramping voltage generation circuitry and a precision air capacitor.
A digital calibration implementation for track-and-hold offset in a high-speed timing-interleaved folding and interpolating analog-to-digital converter is proposed in this paper. The spice simulation and measured results both show that the digital calibration technique can efficiently cancel the T/H offset and improve the linearity of the ADC.
A universal resistance-to-digital converter based on the universal sensors and transducers interfacing integrated circuit (USTI) investigated and described at the first time. A three-point calibration technique for accurate resistance measurements in a wide resistive range has been implemented in a single integrated circuit that allows a direct resistance-to-digital conversion according to three popular...
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