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RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, CMOS Silicon-on-insulator (SOI) has emerged over the past few years as the dominant technology for RF switches in RF FEMs for cell phones and WiFi [1]. While current performances available on RF SOI technology...
In this paper, a novel low-power current-reused folded cascode harmonic rejection mixer (HRM) for digital video broadcasting-terrestrial (DVB-T) tuner application is proposed. In proposed architecture, by adopting current-reused folded cascode topology, linearity of the HRM is improved and the low-power implementation is realized. In the frequency range of 48~862 MHz, simulation results of the proposed...
A 1.2V Gilbert mixer with improved linearity and noise figure is presented. To improve the linearity, an optimum gate bias is applied to the transconductance stage, and a series LC network resonating around 2fLO is implemented at the common source nodes of the switch quad. Analysis shows that the flicker noise performance also benefits from the series resonating network. The 2.1GHz mixer fabricated...
In this paper, a linearization technique for voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is presented. Even order harmonics are canceled by using pseudo-differential architecture with two identical VCO-based ADCs. The effect of cancelation technique is verified through simulation with a prototype designed in 0.18 ??m CMOS technology and verilog. The CMOS ring VCO consumes...
This paper discusses the design of a 60 GHz low noise amplifier (LNA) using a standard low power SOI CMOS process from ST Microelectronics. First, we outline the technology as well as the mm-wave design challenges. Using recent work on coplanar waveguide (CPW) modeling, we describe how it's possible to use parametric, 3D electromagnetic simulation to complete or replace analytical models of on-chip...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
The design of a full integrated electronics readout for the next ILC ECAL presents many challenges. Low power dissipation is required, and it will be necessary to integrate together the very front-end stages with an analog to digital converter. We present here a 12 bit 30 MHz analog to digital converter using a pipelined architecture. It is composed by ten 1.5 bit sub-ADC with a final 2 bit flash...
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