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Layout design principles of IP blocks in the IC, and frequency mixers in particular, are discussed. Several variants of the layout design are carried out. They are modeled and compared to a schematic implementation. Qualitative assessment of implementations is carried out. The conclusions and the ways of improvement are proposed. The nature and the origin of deviations and variations in the process...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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