The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Bias Temperature Instability (BTI) causes significant threshold voltage shift in MOSFET using Hafnium-dioxide (HfO2) High-k dielectric material. Negative BTI and Positive BTI are two types of BTI effects observed in p-channel and n-channel MOSFET. BTI affects the stability and reliability of conventional six transistor (6T) SRAM design in nano-scale CMOS technology. Eight transistor (8T) and Ten transistor...
In this paper, we demonstrate that by introducing a high tensile Inter Layer Dielectric (ILD) in the fabrication process, the hook shaped saturation drain current (Idsat) behavior of NMOS can be reduced and totally eliminated in PMOS for 0.13um technology node. The hook shaped Idsat behavior is caused by the combination of mechanical stress due to Shallow Trench Isolation (STI) in channel width direction...
Polarities of plasma charging damage in n- and p-channel MOSFETs with Hf-based high-k gate stack (HfAlOx/SiO2) were studied for two different plasma sources (Ar-and Cl-based gas mixtures), and found to depend on plasma conditions, in contrast to those with conventional SiO2. For Ar-plasma, which was confirmed to induce a larger charging damage, both n- and p-ch MOSFETs with high-k gate stacks suffer...
In this paper, the authors have demonstrated high-performance inversion-type E-mode In0.65Ga0.35As MOSFETs using ALD high-k gate dielectrics such as ALD Al2O3 and HfO2 with a maximum inversion current as high as 1.05 A/mm and a peak transconductance of 0.37 S/mm. These results suggest In-rich InGaAs could be an ideal channel material which is easy to integrate with high-k dielectrics and has a higher...
In this work, combination of the plasma doping method with flush lamp annealing (FLA) or solid-state laser annealing (ASLA) is shown to be very promising technique to form ultra-shallow and low-resistive junctions for future nano CMOS. Amorphisation by He plasma (He-PA process) is shown to be effective for obtaining shallow junction depth (Xj) and low sheet resistance (Rs). The He-PA process is found...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.