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Side-channel attacks are a potent threat to the security of devices implementing cryptographic algorithms. Designing lightweight countermeasures against side-channel analysis that can run on resource constrained devices is a major challenge. One such lightweight countermeasure is shuffling, in which the designer randomly permutes the order of execution of potentially vulnerable operations. State of...
Montgomery multipliers perform modular multiplication of two integers without trial division. They are often used in implementation of RSA algorithm which demands fast modular multiplication. This paper describes design and FPGA implementation of two architectures 16 bit Montgomery multipliers: fully systolic and parallel. Modules of multipliers are designed in VHDL with parameters easy to change...
To improve the performance of silicon micro-gyroscope (SMG), a digital measurement and control scheme of SMG with symmetrical and decoupled structure is presented. The system was constructed with a high-performance FPGA hardware core and several precision peripherals such as analog and digital hybrid conditioning circuits. Some key modules and algorithm realization including the closed-loop drive...
A Coarse Grain Reconfigurable Architecture (CGRA) tailored for accelerating bio-informatics algorithms is proposed. The key innovation is a light weight bio-informatics processor that can be reconfigured to perform different Add Compare and Select operations of the popular sequencing algorithms. A programmable and scalable architectural platform instantiates an array of such processing elements and...
As the LHC luminosity is ramped up to 3×1034 cm-2 s-1 and beyond, the high rates, multiplicities, and energies of particles seen by the detectors will pose a unique challenge. Only a tiny fraction of the produced collisions can be stored on tape and immense real-time data reduction is needed. An effective trigger system must maintain high trigger efficiencies for the physics we are most interested...
The standard approach to the Backtracking Algorithm is to use any programming language and code that in a sequential manner. The work describes the implementation of a fast computation of the Backtracking Algorithm with FPGA (Field Programmable Gate Array) logic. The specific problem is then encoded into the FPGA structure and solved in the hardware. Each partial candidate of the solution is then...
Rivest, Shamir and Adleman (RSA) encryption algorithm is one of the most widely used and popular public-key cryptosystem. The main step in this algorithm is modular exponentiation which can be done by a sequence of modular multiplication. Thus, modular multiplication is the major factor, in many cryptosystems, e.g. the RSA Two-Key system and in the proposed digital signature standard DSS. One of the...
We present two designs (I and II) for IEEE 754 double precision floating point matrix multiplication, an important kernel in many tile-based BLAS algorithms, optimized for implementation on high-end FPGAs. The designs, both based on the rank-1 update scheme, can handle arbitrary matrix sizes, and are able to sustain their peak performance except during an initial latency period. Through these designs,...
This work proposes an VHDL generation software for optimized FIR filters. In this paper a near optimum algorithm for constant coefficient FIR filters was used. This algorithm uses general coefficient representation for the optimal sharing of partial products in Multiple Constants Multiplications (MCM). The developed tool was compared to Matlab FDA toolbox. Synthesis results show that our tool is able...
A fast intra mode decision algorithm for H.264/AVC is proposed in this paper. The objective is to reduce the encoder complexity without significant rate-distortion performance degradation. Three methods are adopted: (1) the block size is selected between 4times4 block and 16times16 block based on the smoothness and correlation information. (2) A characteristic is also exploited, which is using to...
This paper studies efficient complex valued matrix manipulations for multi-user STBC-MIMO decoding. A novel method called Alamouti blockwise analytical matrix inversion (ABAMI) is proposed for the inversion of large complex matrices that are based on Alamouti sub-blocks. Another method using a variant of Givens rotation is proposed for fast QR decomposition of this kind of matrices. Our solutions...
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