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With increasing demands for more flexible services, the routing policies in enterprise network becomes much richer. This has placed a heavy burden to the current router forwarding plane to support the increasing number of policies, primarily due to the limited capacity in TCAM. This hinders the development of new network services. In this paper, we present the design and implementation of a new forwarding...
Content Centric Network (CCN), a typical incarnation of the Information Centric Network (ICN), which is an active research topic of Future Internet Architecture. Naming the content's chunks, retrieving and forwarding the content chunks according to their names are the core ideas of CCN. But the length of the content's name is variable length, which is an obvious difference from the IP address in the...
In this paper, motivated by reducing power consumption of system-on-chip (SoC), sets of methods are applied in low power design for SoC, especially power management unit integrated. Corresponding to different applications, different power supply is provided. The whole SoC has been implemented with SMIC 0.13um standard CMOS process, the test results show that the operating frequency is 100MHz and the...
We propose a dual TCAM architecture - DUOS, for routing tables. Four memory management schemes for TCAMs also are proposed and evaluated. DUOS and our memory management schemes support control-plane incremental updates without delaying data-plane lookups. Compared to other TCAM architectures such as CAO OPT [19] that support incremental updates without delaying lookups, DUOS offers reduction in power...
Data deduplication is an essential and critical component of backup systems. Essential, because it reduces storage space requirements, and critical, because the performance of the entire backup operation depends on its throughput. Traditional backup workloads consist of large data streams with high locality, which existing deduplication techniques require to provide reasonable throughput. We present...
We investigate various TCAM architectures recently proposed for TCAM power and memory reduction and show that far better power and memory performance is possible when we use an optimal prefix set for the given routing table than when the original prefix set or the reduced prefix set as proposed in other work is used. For EaseCam, our experiments show a power and TCAM memory reduction of 96% to 98%...
In recent years, the potential range of applications for sensor networks is expanding. Their use has been considered for safety critical areas such as: hospitals or power plants. The security comes more to the fore. This paper presents SecSens, an architecture that provides basic security components for wireless sensor networks. Since robust and strong security features require powerful nodes, SecSens...
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmable Gate Arrays (FPGAs), state-of-the-art designs cannot support the current largest routing table(consisting of 257 K prefixes in backbone routers). We propose a novel scalable high-throughput, low-power SRAM-based linear...
The speed of interconnection has grown continually in the fast developing Internet and other networks. Routing lookup has become the bottleneck of high-speed packet forwarding. Obviously, high-speed packet forwarding depends on high-speed routing lookup and update algorithms. This paper discusses Longest Prefix Match algorithm (LPM) based on the hardware structure of network processor (NP). The LPM...
Secure route selection is always a challenge for distributed networks. The paper takes trust value as one of routing metrics for distributed networks to defense some attacks. The paper provides an algorithm to compute trust value and then gives a routing algorithm based on trust value. Trust value's computation takes remembering factor and credibility as main parameters. The final route is secure...
In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities...
The downsizing of transistor dimensions enabled in the future nanotechnologies will inevitably increase the number of faults in the complex ULSI chips. To maintain the production yield at acceptable level, several levels of protection mechanisms will have to be implemented to tolerate the permanent and transient faults occurring in the physical layers. In this paper, we study fault tolerance at the...
In this paper, we propose an adaptive pacing scheme at the link layer for IEEE 802.11 based multihop wireless networks. Our objective is to improve the performance of higher layer protocols without any modifications to them. Our adaptive pacing scheme estimates the four-hop transmission delay in the network path without incurring any additional overheads, and accordingly paces the packets to reduce...
We establish new upper bounds on the complexity of several "rectangle" problems. Our results include, for instance, optimal algorithms for range counting and rectangle searching in two dimensions. These involve linear space implementations of range trees and segment trees. The algorithms we give are simple and practical; they can be dynamized and taken into higher dimensions. Also of interest...
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